VDHL code for permutation
时间：03-30
整理：3721RD
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hey guys, I design a code for permutation in VDHL for my project but didn't manage to.
eg. when pressed 3(sequence) on FPGA development board and get final result to 6 permutation set.
eg. when pressed 3(sequence) on FPGA development board and get final result to 6 permutation set.
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