How to improve insersion loos for UWB wilkinson power divider

Hi

I am working on destining a 2:1 three stage UWB Wilkinson equal power divider for the frequency range (2-7)GHz using CST microwave studio with 50 ohm input and output impedance. The design is attached and the S parameter also.

../imgqa/eboard/EM/EM-qg2c4wjjj4s.jpg
../imgqa/eboard/EM/EM-yn2qpiu5tgj.jpg
../imgqa/eboard/EM/EM-deko5jit2ig.jpg


The problem:

I need to improve the insertion loos for the higher band (4-7)GHz.

Your comments and suggestions will be highly appreciated.

First, make sure your TLines are 90 deg at 4.5 GHz =(2+7)/2.
Second, use real time variable tuning capabilities for the characteristic impedances.

Thanks edf for your reply.
I did not understand fully what you ment by "make sure your TLines are 90 deg" do you mean the connection between the input port and the first section ? if yes. I also designed other model for the power divider and cot similar insertion loss. please check the attached pic.

../imgqa/eboard/EM/EM-0efldofewfs.jpg

If possible ... could you explain in more details how to do real time variable tuning for the characteristic impedance ? ( do you mean parameter sweep ? )



thanks edf for you reply.

I did not fully understand what you do you mean by "make sure your TLines are 90 deg" ... do you mean that the between the input port and the fist stage ? if yes .. I designed other power divider which is in the bellow link:
../imgqa/eboard/EM/EM-focffoosa2p.jpg

and got the similar issue with insertion loss.
beside that could you please explain how to do the real time variable tuning for the characteristic impedance with CST ?
or you mean the parameter sweep ?

I was referring to 90deg (quarterwave) long arms in the Wilkinson splitter being at 4.5GHz. I assumed you simulated the circuit with a linear simulator first before doing the fullwave (EM) simulation. Many linear simulators have variable parameter tuning, but yes you could do a parameter sweep in the fullwave simulator. I do prefer your second layout because it doesn't pinch to a point (at resistor bridge) like the first.

Thanks edf for your reply.
All armed are 90deg ar 4.5 GHz.... I did parameter sweep but for several parameters but the insertion loss slightly changed .
I still do not know how increase the insertion loss.

You can check in simulation what is causing your losses:
- set the conductor to lossless (PEC) so that you see the effect of dielectric lossses only
- set the dielectric loss tangent (tand) to zero so that you see the effect of conductor losses only

If you are using FR4 substrate, you will see higher insertion loss at higher frequencies, caused by the substrate tand.