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a question of port refinement error for HFSS simulation

时间:03-24 整理:3721RD 点击:
hi,my name is shhaha.I'm a freshman using the HFSS for design.Now i nees your help for a problem when i use HFSS to simulate on-chip symmetric inductor.The chip has 6 layers and 5 metal layers,and the inductor is only fabricated on the top metal and vicinity metal layer.The excitement port is used as the wave port.When i simulate the HFSS gives the error information:Port refinement,process abc3d:Cann't find the proper edge for the tetrahedron face.The probable cause is that the problem has reached the resolution limit for the machine. then simulation stop. Can you help me to find the cause of the error and how to revise it? (At the same time, when i change the excitement port to lump port, the same error still stays)

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