ICC floorplan

create_boundary\
-poly { { 1113.0000.000}
{ 1113.000 1456.000}
{0.000 1456.000}
{0.000 1277.740}
{240.000 1277.740}
{240.000 1085.740}
{466.220 1085.740}
{466.220516.000}
{269.000516.000}
{269.0000.000}}
if {[file exists [which $ICC_IN_TDF_FILE]]} {
read_io_constraints $ICC_IN_TDF_FILE
}
initialize_rectilinear_block -use_current_boundary -row_core_ratio 1.00 \
-start_first_row -flip_first_row \
-left_io2core 30.0 \
-right_io2core 30.0 \
-top_io2core 30.0 \
-bottom_io2core 30.0
#initialize_floorplan \
#-control_type width_and_height \
# -core_width 2000 \
# -core_height 2000 \
#-left_io2core 20 \
#-bottom_io2core 20 \
#-right_io2core 20 \
#-top_io2core 20 \
#-start_first_row
derive_pg_connection -power_net {VDD} -ground_net {VSS} -power_pin {VDD} -ground_pin {VSS}
#-layerlayerNumber or maskName from the technology file
create_power_straps-direction horizontal-start_at 38.000 -nets{VDD VSS}-layer 35 -width 3 -configure step_and_stop-step 36 -stop 1456.000 -pitch_within_group 18 -extend_low_ends to_boundary_and_generate_pins -extend_high_ends to_boundary_and_generate_pins -keep_floating_wire_pieces-clip_at_top_cell_boundaries
create_power_straps-direction vertical-start_at 38 -nets{VDD VSS}-layer 36 -width 4 -configure step_and_stop-step 72 -stop 1113.000 -pitch_within_group 36 -extend_low_ends to_boundary_and_generate_pins -extend_high_ends to_boundary_and_generate_pins -keep_floating_wire_pieces-clip_at_top_cell_boundaries
create_power_straps-direction vertical-start_at 56 -nets{VDD VSS}-layer 34 -width 2 -configure step_and_stop-step 72 -stop 1113.000 -pitch_within_group 36 -extend_low_ends to_boundary_and_generate_pins -extend_high_ends to_boundary_and_generate_pins -keep_floating_wire_pieces-clip_at_top_cell_boundaries
#add_tap_cell_array -master_cell_name {FILLTIEHS} -distance 50 -offset 50 \
#-pattern stagger_every_other_row -respect_keepout

果然原创，行得通吗?

For Reference is OK.

什么意思?

能给出$ICC_IN_TDF_FILE样本不?

tdf 不就是 ：set_pin/pad_physical_constraints这个格式么

同问同问同问

what is this create_boundary -poly for?

how to hand place IO pad cells in ICC design planning,I tried reading in the design.DEF with pre-defined locations in component section
but did not work
please help