encounter 工具中 DB命令
个人觉得 FTerm 是展平的端口地址，HTerm 是层次的端口地址，Term是最底层的的端口地址。另一方面：DB的命名方式是什么样子的。在使用DB命令的时候，该从什么角度来准确查到自己需要的DB命令?
求大牛们及时详细解释万分感谢
每隔一段时间这个问题就出来一次啊.继续贴这个经典解释了.
Assuming you are familiar with Verilog constructs, I'll explain it as follows.Assume we have a nand gate called NAND2 connected as follows:
NAND2 U42(.A(net1),.B(net2),.Q(net3));
In this case, the "U42" (the instantiation of the nand gate) would be considered the "inst", "NAND2" would be considered the "cell"."terms" and "fterms" are essentiallys "pins" but the difference is whether it is a pin of the "cell" (fterm) or the pin of the "inst" (term).The 'h' in "hinst" and "hterm" simply means it is hierarchical.For instance, say we have a top-level design "TOP" and a child "CHILD" connected as follows:
module TOP (in, out);
input in;
output out;
CHILD child_inst (.cin (in),.cout (out));
endmodule
module CHILD(cin,cout);
input cin ;
output cin;
...
endmodule
In this case, 'child_inst' would be an 'hinst' and 'child_inst/cin' would be an 'hterm'.However, 'CHILD' is still a 'cell' and 'CHILD/cin' and 'CHILD/cout' are still 'fterms'.Also note the 'TOP' is a cell and 'TOP/in' and 'TOP/out' are 'fterms'.
db命名规则.
通过地址找名字. dbXXName. 比如: dbTermName
通过A地址找B地址. dbAB. 比如: dbInstTerm
通过名字找地址: dbGetXXByName 比如: dbGetInstByName
其他我一时想不起来有什么规律.
PS: 以上拼写可能有错. 习惯tab补全了.
dingding
没关系
相当的感谢，受教了。
写的太好了， edi专家啊
小编过奖了. 搞得我诚惶诚恐啊.我其他地方问过你个问题, 估计你太忙没看到. 这里再写一下.
我觉得perl/tcl写到一定程度就可以了, 有必要研究那么深入么?
因为我看你介绍了一些perl方面的书籍, 觉得你在这方面很精通.
以我现在的层次, 还看不到这样带来的好处. 求指点.
你如果有空就研究啊，不是很难，比IC设计简单
perl如果用到很多pm，能够自己写pm的话，数据结构经常用，已经是高手了
tcl也有package的，没有太深入研究
encounter工具中 DB命令 是什么命令?还望小编解答下~
mark一下
Solution
An fterm is a "formal terminal". Here is a comparison of fterms and terms:
“cells” have “fterms”
“insts” have “terms”
“terms” connect to “nets”
“nets” connect to “terms” and “fterms”
“fterms” are IO Pins as viewed by the top “cell”
“fterms” can also be the pins on a LEF library cell, as in “BUFX2”
Please look into the Database Access Command Diagram in EDI System Database Access Command Reference manual for clarification.
For example, if a Verilog file has:
module top (A, B...)
inst1 BUFX2 ( .a(A), .... )
...
end top
"A" is the fterm and "a" is the term. If you are referring to the pins of a library cell such as BUFX2, then you use "fterm". If you are referring to the pins of an instance of BUFX2 using "term".
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I faced same problem.
赞！很有帮助！