Verilog中Event的使用

module hardreg_top(qout);
output[3:0] qout;

regclock,clearb;
reg[3:0]data;
event end_first_pass;---------------》28行

`define stim #10 data=4'b

hardreg reg_4bit(data,clcok,clearb,qout);//调用另个模块。

initial
begin
clock = 0;
clearb = 1;
end

always#50clock =~ clock;
always@(end_first_pass)
clearb = ~clearb;
always@(posedge clock)
$display("at time %0d clearb= %0b qout = %d qout=%d",$time,clearb,data,qout);


initial
begin
repeat(2)
begin
data = 4'b0000;
`stim 0001;
`stim 0010;
`stim 0011;
`stim 0100;
`stim 0101;
`stim 0110;
`stim 0111;
`stim 1000;
`stim 1001;
`stim 1010;
`stim 1011;
`stim 1100;
`stim 1101;
`stim 1110;
`stim 1111;
end
->end_first_pass;-------------》74行

$finish;
end
endmodule
在用xilinx编译时候，出现以下错误：
ERROR:Xst:850 - "Hardreg4.v" line 28: Unsupported Event Statement.
ERROR:Xst:850 - "Hardreg4.v" line 74: Unsupported Event.
好像我也是在规定的区域里定义的，难道是xilinx不支持?
请达人指教~ 先谢谢了~

我在modelsim里面跑了下，没什么问题

啊，我没在modlesim跑过~ 我试试，谢谢~

谢谢，我试试~

its not sythesis code.thats why u can not run in FPGA. Its simulation code for testbench.

晕，这个东西是用来验证用的，不是用来综合的。

這種code是 behavier code，主要拿來驗證用
所以modelsim可以跑是很合理的
不過要放到xillix的fpga上面的code，必須是RTL code
像event initial $display $finish這種都不應該也不允許出現在可合成的code裏面
多看一些可合成的code，你會發現那些code的寫法都很制式的
絕不像behavier code那麼自由的，想用啥就用啥

寻找一给好人-香港城市大学数学系陈静
寻找一给好人-香港城市大学数学系陈静寻找一给好人-香港城市大学数学系陈静寻找一给好人-香港城市大学数学系陈静

顶一下~

ddddddddddddddddddddddd

bixuding

学习了！

学习了

event不可综合啊。

学习了

确实不行啊

ooooooooook

学习了，这个程序应该是夏宇闻老师的书上面的，我今天上午在quartusII上面运行确实不行，原来是这个原因啊

event是不可综合的

人家小编问的是event 都说不可compile 为何没有人解释下event用法呢
鄙人在密切关注

event是不可以综合的 用来仿真

我想知道event怎麼用

Triggered

The "triggered" event property evaluates to true if the given event has been triggered in the current time-step and false otherwise. If event_identifier is null, then the triggered event property evaluates to false. Using this mechanism, an event trigger shall unblock the waiting process whether the wait executes before or at the same simulation time as the trigger operation.
In the following example, event "e" is triggered at time 20,40,60,80 . So the Value of "e.triggered" should be TRUE at time 20,40,60,80 and FALSE at rest of the time.

EXAMPLE:
module main;
event e;

initial
repeat(4)
begin
#20;
->e ;
$display(" e is triggered at %t ",$time);
end

initial
#100 $finish;

always
begin
#10;
if(e.triggered)
$display(" e is TRUE at %t",$time);
else
$display(" e is FALSE at %t",$time);
end

endmodule
RESULT
e is FALSE at10
e is triggered at20
e is TRUE at20
e is FALSE at30
e is triggered at40
e is TRUE at40
e is FALSE at50
e is triggered at60
e is TRUE at60
e is FALSE at70
e is triggered at80
e is TRUE at80
e is FALSE at90

24楼好人，看来event不是触发上去就掉不下来了。完美的解决了我的问题，回去从新查BUG。