Verification 武汉 清凉来袭 简历发 hr@Hi-talent.com
时间：12-12
整理：3721RD
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Title: Staff verification engineer@武汉 上海 北京 简历发 hr@hi-talent.com
Job Description:
? This position will be a verification technical leader role to develop verification project for 芯得Hi-talent leading edge interface IP. Verification development tasks include verification plan development, test bench generation in UVM/SystemVerilog/C++, test cases development and debug, test environment infra and regression infra development.
? This tech leader position will have to coordinate with various engineering teams across 芯得Hi-talent to drive IP development and successful release with high quality;
? Combine PHY IP development verification process and improve team’s verification technical capabilities; and execute on ASIC verification flow to meet project release quality and schedule requirement.
Requirements:
o MSEE required and 10+ years of verification working experience.
o Hands on experience with creating test plan and test environment from functional specifications and test environment specifications with verification methodology of UVM/VMM.
o Has leadership skills and takes verification ownership on projects.
o Has good analysis and problem-solving skills.
o Has ability to improve work flow and quality.
o Has both of good verbal and written communication skills to work with global teams.
o Interface IP development experience is a big plus.
Best Regards
Jane.Jin 金娟
Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd.
上海芯得企业管理咨询有限公司
上海芯相会企业管理咨询有限公司
Mob: 18502155252
Office Tel： +86-021-80376579
E-Mail: Jane-Jin@hi-talent.com
微信： xinde_jane
QQ: 1600548210
Weibo: http://weibo.com/u/1716864892
website： www.hi-talent.cn
Job Description:
? This position will be a verification technical leader role to develop verification project for 芯得Hi-talent leading edge interface IP. Verification development tasks include verification plan development, test bench generation in UVM/SystemVerilog/C++, test cases development and debug, test environment infra and regression infra development.
? This tech leader position will have to coordinate with various engineering teams across 芯得Hi-talent to drive IP development and successful release with high quality;
? Combine PHY IP development verification process and improve team’s verification technical capabilities; and execute on ASIC verification flow to meet project release quality and schedule requirement.
Requirements:
o MSEE required and 10+ years of verification working experience.
o Hands on experience with creating test plan and test environment from functional specifications and test environment specifications with verification methodology of UVM/VMM.
o Has leadership skills and takes verification ownership on projects.
o Has good analysis and problem-solving skills.
o Has ability to improve work flow and quality.
o Has both of good verbal and written communication skills to work with global teams.
o Interface IP development experience is a big plus.
Best Regards
Jane.Jin 金娟
Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd.
上海芯得企业管理咨询有限公司
上海芯相会企业管理咨询有限公司
Mob: 18502155252
Office Tel： +86-021-80376579
E-Mail: Jane-Jin@hi-talent.com
微信： xinde_jane
QQ: 1600548210
Weibo: http://weibo.com/u/1716864892
website： www.hi-talent.cn
这岗位内部招了有一段时间了～
有能力有资历的人都在一线舒舒服服的安定下来了，谁会换到二线去。