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Impact of thermal overload operation on wirebond and metallization reliability in smart power devices
Glavanovics, M.; Detzel, T.; Weber, K.;
Ifineon Technol. Austria AG, Villach, Austria
This paper appears in: Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European
Issue Date: 21-23 Sept. 2004
On page(s): 273 - 276
ISSN:
Print ISBN: 0-7803-8478-4
Cited by : 3
INSPEC Accession Number: 8169996
Digital Object Identifier: 10.1109/ESSDER.2004.1356542
Date of Current Version: 15 十一月 2004
ABSTRACT
It is well-known that continuous operation of semiconductors under electrical and thermal overload conditions leads to degradation and subsequently to device failure. This paper deals with wirebond and metallization degradation of integrated vertical DMOS switches that are stressed with periodic power dissipation pulses under laboratory conditions. The test setup is briefly described as well as the test results. Physical failure analysis proves that migration phenomena in the power metallization, as well as bond wire delamination, play a crucial role in device aging. A model of time to failure is derived from measured data. It implies that thermomechanical as well as electrical mechanisms contribute to final device failure. Several hypotheses are discussed, showing that the wirebond-metallization interface is most probably the weak point of power switch robustness. Further tasks will therefore include evaluating possible improvements on power metallization and bond connection reliability.
Impact of thermal overload operation on wirebond and metallization reliability in smart power devices
Glavanovics, M.; Detzel, T.; Weber, K.;
Ifineon Technol. Austria AG, Villach, Austria
This paper appears in: Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European
Issue Date: 21-23 Sept. 2004
On page(s): 273 - 276
ISSN:
Print ISBN: 0-7803-8478-4
Cited by : 3
INSPEC Accession Number: 8169996
Digital Object Identifier: 10.1109/ESSDER.2004.1356542
Date of Current Version: 15 十一月 2004
ABSTRACT
It is well-known that continuous operation of semiconductors under electrical and thermal overload conditions leads to degradation and subsequently to device failure. This paper deals with wirebond and metallization degradation of integrated vertical DMOS switches that are stressed with periodic power dissipation pulses under laboratory conditions. The test setup is briefly described as well as the test results. Physical failure analysis proves that migration phenomena in the power metallization, as well as bond wire delamination, play a crucial role in device aging. A model of time to failure is derived from measured data. It implies that thermomechanical as well as electrical mechanisms contribute to final device failure. Several hypotheses are discussed, showing that the wirebond-metallization interface is most probably the weak point of power switch robustness. Further tasks will therefore include evaluating possible improvements on power metallization and bond connection reliability.