Wavante - your complete soc design partner
时间：12-12
整理：3721RD
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http://www.wavante.com/cn/
Wavante公司是您在半导体业内的顾问伙伴。我们的服务包括从新技术、新设计方案的咨询建议到提供设计实现方案等，我们广泛的设计经验确保了客户芯片产品上市的性价比最高。Wavante公司以客户的目标来制定商业模式，已经为许多领先的半导体公司提供服务，使客户的项目按时或提前上市，达到甚至超越性能目标，同时也降低项目成本。
1. 我们公司有丰富的IP 平台
2. 我们提供RTL2GDSII的后端设计服务
3.我们提供ASIC TURNKEY & 顾问服务，
现在应公司发展需要，招聘以下职位， 工作地点在北京或上海，
有意者请发简历至： mike.zeng@wavante.com ，
Position : backend design engineer/ PR engineer
Responsibility:
- Contribute to back end environment/flow improvement for layout
- Participate in the back end work from netlist to GDSii
- Write scripts for automatic running of P&R, DRC/LVS, SI analysis, IR analysis
- Execute one of tasks of P&R, CTS, DRC/LVS, Power analysis, IR analysis, RC
extraction etc
- Generate and analyze the reports and provide fixing solutions
Qualification:
- 3~5 year work experience for Bachelor’s degree, or 2~3 year work experience for Master's degree in Electrical Engineering, Computer Science, or related discipline
- Successful tapeout and working experiences from RTL to GDS on 0.13u, 90nm, or
65nm technology
- Track record of tapeout real products is a must
- Should be a power user of EDA CAD tools
- Proficient in one or more following areas SI analysis, IR analysis, CTS, RC
extractions andPhysical Verification
on tapeout designs is a big plus
- Good programming skill, using Perl, Tcl
- team player, Good communication capability
- Self-starter, High degree of initiative and responsibility
- Good English capability
- Electronic industry is preferred.
Position : SoC Design and Verification Engineer
Responsibilities:
Build up verification testbench for full chip and unit
Excute verification including writing test plan and test case, making coverage analysis and regression test
IP design and verification
Requirements:
Experience with SoC chip level and unit level verification
2+ years SoC design and verification experience including 1+ verification experience
Good experience of writing test plan, build up testbench, writing test case, making coverage analysis and regression test
Experience with System Verilog
Experience with Verilog logic design and RTL code debug
Experience with C or C++
Experience with VCS or NC-Verilog or Modelsim
Experience with C_SHELL or TCL or PERL
Experience with VMM or OVM (UVM) is a strong plus
Experience with Low Power Verification with UPF or CPF is a strong plus
Experience with System C is a plus
Excellent communication skills
Good written English skills
Self-motivated and good team player
Position: ASIC Design Engineer
Responsibilities:
1. ASIC design flow, including synthesis, static timing analysis, formal verification and design for test.
2. IP design and integration
Requirements:
1. BSEE or above
2. Experienced in frontend design of ASIC or FPGA chips
3. Experienced in one or more aspects in ASIC design flow:
a. Logic synthesis
b. STA
c. Formal verification
d. DFT, ATPG, MBIST
Position ： FAE现场应用工程师
工作职责：
1. 售前技术咨询、解决方案制定、竞争分析等
2. 负责客户售前售后过程中出现问题的跟踪、反馈及疑难问题的处理，技术信息的收集、整理
3. 同业务部同事或者市场部同事一起拜访客户，推广公司产品
4. 在客户和原厂之间起到良好的桥梁作用
5. 及时了解和学习公司最新的产品和技术
6. 协助公司的研发团队完成研发项目
7. 总结FAE中遇到的问题和解决的方法，及时反馈给Sales和研发部门
岗位要求：
1. 大学本科以上学历，电子 微电子 信息工程等相关专业优先
2. 熟悉本公司的芯片，有设计的经验，熟悉相关软件编程
3. 具有一定的编程经验,熟悉VC++优先
4. 具有良好的中英文表达能力,善于与人沟通
5. 具有吃苦耐劳的精神,有团队精神，能适应出差
英语能力要求：
通过英语四级（CET4）或以上的英语考试, 具备英语听说读写沟通能力
Wavante公司是您在半导体业内的顾问伙伴。我们的服务包括从新技术、新设计方案的咨询建议到提供设计实现方案等，我们广泛的设计经验确保了客户芯片产品上市的性价比最高。Wavante公司以客户的目标来制定商业模式，已经为许多领先的半导体公司提供服务，使客户的项目按时或提前上市，达到甚至超越性能目标，同时也降低项目成本。
1. 我们公司有丰富的IP 平台
2. 我们提供RTL2GDSII的后端设计服务
3.我们提供ASIC TURNKEY & 顾问服务，
现在应公司发展需要，招聘以下职位， 工作地点在北京或上海，
有意者请发简历至： mike.zeng@wavante.com ，
Position : backend design engineer/ PR engineer
Responsibility:
- Contribute to back end environment/flow improvement for layout
- Participate in the back end work from netlist to GDSii
- Write scripts for automatic running of P&R, DRC/LVS, SI analysis, IR analysis
- Execute one of tasks of P&R, CTS, DRC/LVS, Power analysis, IR analysis, RC
extraction etc
- Generate and analyze the reports and provide fixing solutions
Qualification:
- 3~5 year work experience for Bachelor’s degree, or 2~3 year work experience for Master's degree in Electrical Engineering, Computer Science, or related discipline
- Successful tapeout and working experiences from RTL to GDS on 0.13u, 90nm, or
65nm technology
- Track record of tapeout real products is a must
- Should be a power user of EDA CAD tools
- Proficient in one or more following areas SI analysis, IR analysis, CTS, RC
extractions andPhysical Verification
on tapeout designs is a big plus
- Good programming skill, using Perl, Tcl
- team player, Good communication capability
- Self-starter, High degree of initiative and responsibility
- Good English capability
- Electronic industry is preferred.
Position : SoC Design and Verification Engineer
Responsibilities:
Build up verification testbench for full chip and unit
Excute verification including writing test plan and test case, making coverage analysis and regression test
IP design and verification
Requirements:
Experience with SoC chip level and unit level verification
2+ years SoC design and verification experience including 1+ verification experience
Good experience of writing test plan, build up testbench, writing test case, making coverage analysis and regression test
Experience with System Verilog
Experience with Verilog logic design and RTL code debug
Experience with C or C++
Experience with VCS or NC-Verilog or Modelsim
Experience with C_SHELL or TCL or PERL
Experience with VMM or OVM (UVM) is a strong plus
Experience with Low Power Verification with UPF or CPF is a strong plus
Experience with System C is a plus
Excellent communication skills
Good written English skills
Self-motivated and good team player
Position: ASIC Design Engineer
Responsibilities:
1. ASIC design flow, including synthesis, static timing analysis, formal verification and design for test.
2. IP design and integration
Requirements:
1. BSEE or above
2. Experienced in frontend design of ASIC or FPGA chips
3. Experienced in one or more aspects in ASIC design flow:
a. Logic synthesis
b. STA
c. Formal verification
d. DFT, ATPG, MBIST
Position ： FAE现场应用工程师
工作职责：
1. 售前技术咨询、解决方案制定、竞争分析等
2. 负责客户售前售后过程中出现问题的跟踪、反馈及疑难问题的处理，技术信息的收集、整理
3. 同业务部同事或者市场部同事一起拜访客户，推广公司产品
4. 在客户和原厂之间起到良好的桥梁作用
5. 及时了解和学习公司最新的产品和技术
6. 协助公司的研发团队完成研发项目
7. 总结FAE中遇到的问题和解决的方法，及时反馈给Sales和研发部门
岗位要求：
1. 大学本科以上学历，电子 微电子 信息工程等相关专业优先
2. 熟悉本公司的芯片，有设计的经验，熟悉相关软件编程
3. 具有一定的编程经验,熟悉VC++优先
4. 具有良好的中英文表达能力,善于与人沟通
5. 具有吃苦耐劳的精神,有团队精神，能适应出差
英语能力要求：
通过英语四级（CET4）或以上的英语考试, 具备英语听说读写沟通能力