A problem about Xtal ocsilation circuit

Now I design and sim an oscilation circuit for PLL using offchip Xtal. Target output freq=32M. Pls see attachment for oscillation circuit recommended.
1) I put a port in series with L1 & C1 and run sp sim. Zreal<0 near 32M when Zim=0. So negative resistance is acheived for oscilation.
2) I put a probe in the close loop(near inverter) and run sdb sim. The Phase and Gain Margin never <0 no matter how I adjust parameters.
In the end it cannot start oscillation.
I wanna why the 2 sim controdicts each other?
Thanks
PS: I can adjust value of Cg,Cd,Rd,Rx,Rf and WL of inverter.

仿close loop的负阻不带crystal的model直接扫xo xi，32M crystal的等效电阻大概就几个欧，我估计你能扫出负阻来基本上就可以了。另外一项是扫开环带crystal的增益相位，你们不仿么？呵呵。如果上面两个都满足还不振，你可以试下在crystal的L和C之间加一个幅度很大的期望振荡频率的sin,把这个sin的damping 搞到很大看下能振不。一般你这个频率100多个u肯定振起来了

Yes, My <1> is 负阻(Xtak model added for preciseness) and <2> is 开环带crystal的增益相位. But <2> always fails even when <1> passes.

是不是你扫得不够密啊？在35MHz左右一点点密集扫就可以了，model正确的话这个应该很容易仿出来。还有<1> 跟<2>好像没啥大关系

Now I do a trans and found it`s oscillating at a very low amplitude----that`s very caz neg-res formed but open-loop-gain-margin>0(which means a stable loop).
this is the same phenomenon u told me in ur circuit? By the way, do u solve urs? If yes, how?

Oh my god. I failed in std-sim really due to not enough sample-density... Now I sim from 20M-40M including 4000pts just as u said and find there`s a very sharp&sudden peak gain near 32M!
However, trans still ocsillate at a very low amp...
do u have some other recommandation, big cow?