allegroPCB导入问题请高手指点。

Cadence Design Systems, Inc. netrev 16.2 Thu May 17 10:42:43 2012
(C) Copyright 2002 Cadence Design Systems, Inc.
------ Directives ------
RIPUP_ETCH FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY 'E:/allegroPCB/Allegro.PCB';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'E:/allegroPCB/Allegro.PCB/TAD2030A.brd';
NEW_BOARD_NAME 'E:/allegroPCB/Allegro.PCB/TAD2030A.brd';
CmdLine: netrev -$ -i E:/allegroPCB/Allegro.PCB -y 1 E:/allegroPCB/Allegro.PCB/#Taaaaaa02640.tmp
------ Preparing to read pst files ------
Starting to read E:/allegroPCB/Allegro.PCB/pstchip.dat
   Finished reading E:/allegroPCB/Allegro.PCB/pstchip.dat (00:00:00.18)
Starting to read E:/allegroPCB/Allegro.PCB/pstxprt.dat
   Finished reading E:/allegroPCB/Allegro.PCB/pstxprt.dat (00:00:00.00)
Starting to read E:/allegroPCB/Allegro.PCB/pstxnet.dat
   Finished reading E:/allegroPCB/Allegro.PCB/pstxnet.dat (00:00:00.00)
------ Oversights/Warnings/Errors ------

ERROR(SPMHUT-1): Illegal character(s) present in the name or value.
------ Summary Statistics ------

#1   Run stopped because errors were detected
netrev run on May 17 10:42:43 2012
   DESIGN NAME : 'TDA2030系统板'
   PACKAGING ON Sep 28 2008 21:55:15
   COMPILE 'logic'
   CHECK_PIN_NAMES OFF
   CROSS_REFERENCE OFF
   FEEDBACK OFF
   INCREMENTAL OFF
   INTERFACE_TYPE PHYSICAL
   MAX_ERRORS 500
   MERGE_MINIMUM 5
   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
   NET_NAME_LENGTH 24
   OVERSIGHTS ON
   REPLACE_CHECK OFF
   SINGLE_NODE_NETS ON
   SPLIT_MINIMUM 0
   SUPPRESS   20
   WARNINGS ON
  1 errors detected
No oversight detected
No warning detected
cpu time      0:01:04
elapsed time  0:00:00
这个是什么问题啊请高手指点 谢谢。

有无效的字符，检查一下吧
最好不要有中文

恩谢谢已经解决了（中文去了就OK）