自动扇出出错
时间：10-02
整理：3721RD
点击：
自动扇出时提示如下：
===============================================================================
# Allegro PCB Router
# Copyright 1990-2006 Cadence Design Systems, Inc. All Rights Reserved.
# ===============================================================================
#
# Software licensed for sale by Cadence Design Systems, Inc.
# Current time = Wed May 18 23:45:28 2011
#
# Allegro PCB Router v16-3-85 made 2011/02/14 at 12:53:30
# Running on: pc-200201020345, OS Version: WindowsNT 5.1.2600, Architecture: Intel Pentium
# Licensing: The program will not obey any unlicensed rules
# No graphics will be displayed.
# Design Name F:/ORCAD/dsp/dsp board\dsp_xnet.dsn
# Batch File Name: pasde.do
# Did File Name: F:/ORCAD/dsp/dsp board/specctra1.did
# Current time = Wed May 18 23:45:28 2011
# PCB F:/ORCAD/dsp/dsp board
# Master Unit set up as: MIL 1000
# PCB Limits xlo=-4032.0000 ylo=-4032.0000 xhi=14032.0000 yhi=8032.0000
# Total 277 Images Consolidated.
# Via 'VIA100-50-120' z=1, 2 xlo=-19.6850 ylo=-19.6850 xhi= 19.6850 yhi= 19.6850
# Via VIA60_35_95 z=1, 2 xlo=-11.8100 ylo=-11.8100 xhi= 11.8100 yhi= 11.8100
#
# VIA TOP BOTTOM
#
# TOP ----------- VIA60_35_95
# BOTTOM VIA60_35_95 -----------
#
# <<WARNING:>> Net VCC3V3 is defined as a signal net and contains 118 pins.
# This is more pins than most signal nets contain.
# Please verify whether net VCC3V3 should be a signal net or a power net.
# Note that a signal net will be routed as starburst or daisy chain.
# <<WARNING:>> Net GND is defined as a signal net and contains 283 pins.
# This is more pins than most signal nets contain.
# Please verify whether net GND should be a signal net or a power net.
# Note that a signal net will be routed as starburst or daisy chain.
# <<ERROR:>> Error in file F:/ORCAD/dsp/dsp board\dsp_xnet.dsn, line 6229: token 5 = Orphan_net
# (content): (wire (net Orphan_net) (type route))
# <<ERROR:>> Parser: Unrecognized token net while parsing shape
怎么解决啊?
===============================================================================
# Allegro PCB Router
# Copyright 1990-2006 Cadence Design Systems, Inc. All Rights Reserved.
# ===============================================================================
#
# Software licensed for sale by Cadence Design Systems, Inc.
# Current time = Wed May 18 23:45:28 2011
#
# Allegro PCB Router v16-3-85 made 2011/02/14 at 12:53:30
# Running on: pc-200201020345, OS Version: WindowsNT 5.1.2600, Architecture: Intel Pentium
# Licensing: The program will not obey any unlicensed rules
# No graphics will be displayed.
# Design Name F:/ORCAD/dsp/dsp board\dsp_xnet.dsn
# Batch File Name: pasde.do
# Did File Name: F:/ORCAD/dsp/dsp board/specctra1.did
# Current time = Wed May 18 23:45:28 2011
# PCB F:/ORCAD/dsp/dsp board
# Master Unit set up as: MIL 1000
# PCB Limits xlo=-4032.0000 ylo=-4032.0000 xhi=14032.0000 yhi=8032.0000
# Total 277 Images Consolidated.
# Via 'VIA100-50-120' z=1, 2 xlo=-19.6850 ylo=-19.6850 xhi= 19.6850 yhi= 19.6850
# Via VIA60_35_95 z=1, 2 xlo=-11.8100 ylo=-11.8100 xhi= 11.8100 yhi= 11.8100
#
# VIA TOP BOTTOM
#
# TOP ----------- VIA60_35_95
# BOTTOM VIA60_35_95 -----------
#
# <<WARNING:>> Net VCC3V3 is defined as a signal net and contains 118 pins.
# This is more pins than most signal nets contain.
# Please verify whether net VCC3V3 should be a signal net or a power net.
# Note that a signal net will be routed as starburst or daisy chain.
# <<WARNING:>> Net GND is defined as a signal net and contains 283 pins.
# This is more pins than most signal nets contain.
# Please verify whether net GND should be a signal net or a power net.
# Note that a signal net will be routed as starburst or daisy chain.
# <<ERROR:>> Error in file F:/ORCAD/dsp/dsp board\dsp_xnet.dsn, line 6229: token 5 = Orphan_net
# (content): (wire (net Orphan_net) (type route))
# <<ERROR:>> Parser: Unrecognized token net while parsing shape
怎么解决啊?