关于UPDATE DRC后出现的问题

请教高手：

我在做第二板的PCB里，没做DATABASE CHECK时没有DRC，但做UPDATE DRC后，负片层出现VIA到VIA错误，这是怎么回事。有谁知道?

要出GERBER了，出现这么一个问题，急死了。有谁知道，请帮帮忙，谢谢了！

错误的提示是什么?

错误的提示是

(------------------------------------------------------------)
( )
( Batch DRC Update )
( )
( Drawing : pmp-gwd25_pcb2_v1.0_pcb_1208.brd )
( Software Version : 15.2s017 )
( Date/Time : Thu Dec 08 12:01:20 2005 )
( )
(------------------------------------------------------------)

..... batch DRC requested for all elements

========= check shapes Thu Dec 08 12:01:20 2005
========= check standalone pins Thu Dec 08 12:01:21 2005
========= check symbols (pins,lines,text) Thu Dec 08 12:01:21 2005
========= check nets Thu Dec 08 12:01:22 2005
========= check standalone branches Thu Dec 08 12:01:25 2005
========= check standalone filled rectangles Thu Dec 08 12:01:25 2005
========= check standalone lines Thu Dec 08 12:01:25 2005
========= check standalone text Thu Dec 08 12:01:25 2005
========= check standalone rectangles Thu Dec 08 12:01:25 2005

..... Total number of DRC errors 941

..... end batch DRC at Thu Dec 08 12:01:25 2005
*************************************************************************

错误的提示是:

LISTING: 1 element(s)

< DRC ERROR >

Class: DRC ERROR CLASS
Subclass: GND02
Origin xy: (2842.080 385.214)

CONSTRAINT: Thru Via to Thru Via Spacing
CONSTRAINT SET: DEFAULT
CONSTRAINT TYPE: NET SPACING CONSTRAINTS
Constraint value: 5 MIL
Actual value: 0 MIL

- - - - - - - - - - - - - - - - - - - -

Element type: VIA
Class: VIA CLASS

origin-xy: (2822.475 389.169)

part of net name: SYS_MA1

number of connected lines: 3

padstack name: VIA12-GEN

padstack defined from TOP to BOTTOM
rotation: 0.000 degrees
via is not mirrored

- - - - - - - - - - - - - - - - - - - -

Element type: VIA
Class: VIA CLASS

origin-xy: (2845.000 405.000)

part of net name: RESET#

number of connected lines: 3

padstack name: VIA12-GEN

padstack defined from TOP to BOTTOM
rotation: 0.000 degrees
via is not mirrored

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