请问如何给FPGA器件的具体引脚附加模型?
时间:10-02
整理:3721RD
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小弟初学Allegro SI。现想仿真XILINX V5的GTP特性。请问如何给器件的某一确定引脚附加 电平模型?
主要是有一点想不明白:器件上的引脚编号为A1,A2,A3……AW1,AW2……AW34;但xilinx提供的IBIS模型中的定义为:
|************************************************************************
| Component VIRTEX-5
|************************************************************************
|
[Component] VIRTEX-5
[Manufacturer] Xilinx Inc.
[Package]
|FF1136
|variable typ min max
R_pkg 331.37m 22.22m 1036.83m
L_pkg 3.70nH 0.52nH 10.16nH
C_pkg 2.22pF 0.91pF 5.00pF
[Pin] signal_name model_name R_pin L_pin C_pin
PGND GND GND
VCCO VCCO POWER
| model selector
1 GTL GTL
2 GTLP GTLP
3 HSTL_I_12 HSTL_I_12
4 HSTL_I HSTL_I
5 HSTL_I_18 HSTL_I_18
6 HSTL_II HSTL_II
7 HSTL_II_18 HSTL_II_18
8 HSTL_III HSTL_III
9 HSTL_III_18 HSTL_III_18
10 HSTL_IV HSTL_IV
11 HSTL_IV_18 HSTL_IV_18
12 SSTL18_I SSTL18_I
13 SSTL2_I SSTL2_I
14 SSTL18_II SSTL18_II
15 SSTL2_II SSTL2_II
|
| Differential HSTL
|
16P DIFF_HSTL_I_P HSTL_I
16N DIFF_HSTL_I_N HSTL_I
…………
…………
[Diff Pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max
|
16P 16N 200mV 0 0 0
17P 17N 200mV 0 0 0
18P 18N 200mV 0 0 0
19P 19N 200mV 0 0 0
|
20P 20N 250mV 0 0 0
21P 21N 250mV 0 0 0
22P 22N 310mV 0 0 0
23P 23N 310mV 0 0 0
|
132P 132N 200mV 0 0 0
133P 133N 200mV 0 0 0
134P 134N 200mV 0 0 0
135P 135N 200mV 0 0 0
…………
主要是有一点想不明白:器件上的引脚编号为A1,A2,A3……AW1,AW2……AW34;但xilinx提供的IBIS模型中的定义为:
|************************************************************************
| Component VIRTEX-5
|************************************************************************
|
[Component] VIRTEX-5
[Manufacturer] Xilinx Inc.
[Package]
|FF1136
|variable typ min max
R_pkg 331.37m 22.22m 1036.83m
L_pkg 3.70nH 0.52nH 10.16nH
C_pkg 2.22pF 0.91pF 5.00pF
[Pin] signal_name model_name R_pin L_pin C_pin
PGND GND GND
VCCO VCCO POWER
| model selector
1 GTL GTL
2 GTLP GTLP
3 HSTL_I_12 HSTL_I_12
4 HSTL_I HSTL_I
5 HSTL_I_18 HSTL_I_18
6 HSTL_II HSTL_II
7 HSTL_II_18 HSTL_II_18
8 HSTL_III HSTL_III
9 HSTL_III_18 HSTL_III_18
10 HSTL_IV HSTL_IV
11 HSTL_IV_18 HSTL_IV_18
12 SSTL18_I SSTL18_I
13 SSTL2_I SSTL2_I
14 SSTL18_II SSTL18_II
15 SSTL2_II SSTL2_II
|
| Differential HSTL
|
16P DIFF_HSTL_I_P HSTL_I
16N DIFF_HSTL_I_N HSTL_I
…………
…………
[Diff Pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max
|
16P 16N 200mV 0 0 0
17P 17N 200mV 0 0 0
18P 18N 200mV 0 0 0
19P 19N 200mV 0 0 0
|
20P 20N 250mV 0 0 0
21P 21N 250mV 0 0 0
22P 22N 310mV 0 0 0
23P 23N 310mV 0 0 0
|
132P 132N 200mV 0 0 0
133P 133N 200mV 0 0 0
134P 134N 200mV 0 0 0
135P 135N 200mV 0 0 0
…………
pin number要自己修改
如果不想修改的话
可以先不分配model
采用默认模型
然后再SixP里对Model进行修改
