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基于uClinux内核移植ARM开发板应用

时间:12-05 来源:互联网 点击:

d(32bit)

MyHandleSWI DCD

HandleSWI

MyHandlePabort DCD HandlePabort

MyHandleDabort DCD

HandleDabort

MyHandleIRQ DCD HandleIRQ

MyHandleFIQ DCD HandleFIQ

ExceptionHanlderEnd

建立二级矢量表:

;****************************************************

;* Setup IRQ handler

*

;****************************************************

ldr

r0,=(_IRQ_BASEADDRESS + 0x100)

ldr r2,=_IRQ_BASEADDRESS

add r3,r0,

#0x100

0

CMP r0, r3

STRCC r2, [r0], #4;cc:Carry clear;save R2 to R0

address, R0 =R0+ 4。

BCC %B0

ldr r1,=_IRQ_BASEADDRESS

ldr r0,=ExceptionHanlderBegin ;if there isn't

'subs pc,lr,#4' at 0x18, 0x1c

ldr r3,=ExceptionHanlderEnd

0

CMP r0, r3

;put the vector table at _IRQ_BASEADDRESS(0xc000000)

LDRCC r2, [r0],

#4

STRCC r2, [r1], #4

BCC %B0

ldr r1,=DIsrIRQ;put the IRQ judge program at

_IRQ_BASEADDRESS+0x80(0xc000080)

ldr r0,=IsrIRQ ;if there isn't 'subs

pc,lr,#4' at 0x18, 0x1c

ldr r3,=IsrIRQEnd

0

CMP r0, r3

LDRCC r2,

[r0], #4

STRCC r2, [r1], #4

BCC %B0

ldr r1, =MyHandleIRQ ;MyHandleIRQ point to DIsrIRQ

ldr r0,

=ExceptionHanlderBegin

ldr r4, =_IRQ_BASEADDRESS;

sub r0, r1, r0

add

r0, r0,r4

ldr r1, =DIsrIRQ

str r1, [r0]

定义Handlexxx:

^ (_IRQ_BASEADDRESS)

HandleReset # 4

HandleUndef # 4

HandleSWI #

4

HandlePabort # 4

HandleDabort # 4

HandleReserved # 4

HandleIRQ #

4

HandleFIQ # 4

^ (_IRQ_BASEADDRESS+0x80)

DIsrIRQ # 4

;IntVectorTable

^

(_IRQ_BASEADDRESS+0x100)

HandleADC # 4

HandleRTC # 4

HandleUTXD1 #

4

HandleUTXD0 # 4

HandleSIO # 4

HandleIIC # 4

HandleURXD1 #

4

HandleURXD0 # 4

HandleTIMER5 # 4

HandleTIMER4 # 4

HandleTIMER3 #

4

HandleTIMER2 # 4

HandleTIMER1 # 4

HandleTIMER0 # 4

HandleUERR01 #

4

HandleWDT # 4

HandleBDMA1 # 4

HandleBDMA0 # 4

HandleZDMA1 #

4

HandleZDMA0 # 4

HandleTICK # 4

HandleEINT4567 # 4

HandleEINT3 #

4

HandleEINT2 # 4

HandleEINT1 # 4

HandleEINT0 # 4

将异常中断矢量重构到SDRAM,这样的好处就是可以在其它的功能程序内对中断处理程序的地址任意赋值。为此,我们在44b.h文件中定义:

/* ISR */

#define pISR_RESET (*(unsigned

*)(_IRQ_BASEADDRESS+0x0))

#define pISR_UNDEF (*(unsigned

*)(_IRQ_BASEADDRESS+0x4))

#define pISR_SWI (*(unsigned

*)(_IRQ_BASEADDRESS+0x8))

#define pISR_PABORT (*(unsigned

*)(_IRQ_BASEADDRESS+0xc))

#define pISR_DABORT (*(unsigned

*)(_IRQ_BASEADDRESS+0x10))

#define pISR_RESERVED (*(unsigned

*)(_IRQ_BASEADDRESS+0x14))

#define pISR_IRQ (*(unsigned

*)(_IRQ_BASEADDRESS+0x18))

#define pISR_FIQ (*(unsigned

*)(_IRQ_BASEADDRESS+0x1c))

#define pISR_ADC (*(unsigned *)(_IRQ_BASEADDRESS+0x100))//0x20))

#define

pISR_RTC (*(unsigned *)(_IRQ_BASEADDRESS+0x104))//0x24))

#define pISR_UTXD1

(*(unsigned *)(_IRQ_BASEADDRESS+0x108))//0x28))

#define pISR_UTXD0

(*(unsigned *)(_IRQ_BASEADDRESS+0x10c))//0x2c))

#define pISR_SIO (*(unsigned

*)(_IRQ_BASEADDRESS+0x110))//0x30))

#define pISR_IIC (*(unsigned

*)(_IRQ_BASEADDRESS+0x114))//0x34))

#define pISR_URXD1 (*(unsigned

*)(_IRQ_BASEADDRESS+0x118))//0x38))

#define pISR_URXD0 (*(unsigned

*)(_IRQ_BASEADDRESS+0x11c))//0x3c))

#define pISR_TIMER5 (*(unsigned

*)(_IRQ_BASEADDRESS+0x120))//0x40))

#define pISR_TIMER4 (*(unsigned

*)(_IRQ_BASEADDRESS+0x124))//0x44))

#define pISR_TIMER3 (*(unsigned

*)(_IRQ_BASEADDRESS+0x128))//0x48))

#define pISR_TIMER2 (*(unsigned

*)(_IRQ_BASEADDRESS+0x12c))//0x4c))

#define pISR_TIMER1 (*(unsigned

*)(_IRQ_BASEADDRESS+0x130))//0x50))

#define pISR_TIMER0 (*(unsigned

*)(_IRQ_BASEADDRESS+0x134))//0x54))

#define pISR_UERR01 (*(unsigned

*)(_IRQ_BASEADDRESS+0x138))//0x58))

#define pISR_WDT (*(unsigned

*)(_IRQ_BASEADDRESS+0x13c))//0x5c))

#define pISR_BDMA1 (*(unsigned

*)(_IRQ_BASEADDRESS+0x140))//0x60))

#define pISR_BDMA0 (*(unsigned

*)(_IRQ_BASEADDRESS+0x144))//0x64))

#define pISR_ZDMA1 (*(unsigned

*)(_IRQ_BASEADDRESS+0x148))//0x68))

#define pISR_ZDMA0 (*(unsigned

*)(_IRQ_BASEADDRESS+0x14c))//0x6c))

#define pISR_TICK (*(unsigned

*)(_IRQ_BASEADDRESS+0x150))//0x70

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