使用先进技术来加速SoC验证

另外基于不同的验证阶段，建议使用不同调试粒度的仿真参数，也可以节省很多的仿真时间/内存消耗。后继我们会考虑使用DLP技术以及一些更新的有关performance的工具去尝试对性能进行进一步的优化。

参考文献：

[1] VCS/VCSi User Guide , G-2012.09, 2012-09

[2] VCS / VCSiTM LCA Features, G-2012.09, 2012-09

[3] Linking Novas Files with Simulators and Enabling FSDB Dumping , SpringSoft, 2013-04

[4] Shi, Jian, Ph.D., Improving Simulation Performance with GPUs[M].UNIVERSITY OF SOUTH CAROLINA, 2011

[5] SoC Simulation Performance: Bottlenecks and Remedies, Patrick Hamilton, Richard Yin, Bobjee Nibhanupudi, Amol Bhinge of Freescale, SNUG, 2012

[6] SystemVerilog for Verification, by Christian B. Spear, Springer, 2006-07

[7] Multicore Processors and Systems, Stephen W. Keckler, H. Peter Hofstee, springer, 2009

[8] IEEE standarad for SystemVerilog—Unified Hardware Design, Specification, and Verification Language, IEEE computer Society, 2009 (IEEE 1800TM – 2009)