stm32f10x.h文件分析理解

IMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/

标准外设库版本号的定义

/*** @brief STM32F10x Standard Peripheral Library version number*/#define __STM32F10X_STDPERIPH_VERSION_MAIN   (0x03) /*!< [31:24] main version */                                  #define __STM32F10X_STDPERIPH_VERSION_SUB1   (0x05) /*!< [23:16] sub1 version */#define __STM32F10X_STDPERIPH_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */#define __STM32F10X_STDPERIPH_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ #define __STM32F10X_STDPERIPH_VERSION       ( (__STM32F10X_STDPERIPH_VERSION_MAIN < 24)\|(__STM32F10X_STDPERIPH_VERSION_SUB1 < 16)\|(__STM32F10X_STDPERIPH_VERSION_SUB2 < 8)\|(__STM32F10X_STDPERIPH_VERSION_RC))

配置Cortex-M3处理器和核内外设

/*** @brief Configuration of the Cortex-M3 Processor and Core Peripherals */#ifdef STM32F10X_XL#define __MPU_PRESENT             1 /*!< STM32 XL-density devices provide an MPU */#else#define __MPU_PRESENT             0 /*!< Other STM32 devices does not provide an MPU */#endif /* STM32F10X_XL */#define __NVIC_PRIO_BITS          4 /*!< STM32 uses 4 Bits for the Priority Levels    */#define __Vendor_SysTickConfig    0 /*!< Set to 1 if different SysTick Config is used */

中断线定义，前部分对于所有STM32F10x都有相同定义，后部分根据不同器件容量采用条件编译定义不同中断线。

/*** @brief STM32F10x Interrupt Number Definition, according to the selected device *        in @ref Library_configuration_section */typedef enum IRQn{/******  Cortex-M3 Processor Exceptions Numbers ***************************************************/NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                             */MemoryManagement_IRQn       = -12,    /*!< 4 Cortex-M3 Memory Management Interrupt              */BusFault_IRQn               = -11,    /*!< 5 Cortex-M3 Bus Fault Interrupt                      */UsageFault_IRQn             = -10,    /*!< 6 Cortex-M3 Usage Fault Interrupt                    */SVCall_IRQn                 = -5,     /*!< 11 Cortex-M3 SV Call Interrupt                       */DebugMonitor_IRQn           = -4,     /*!< 12 Cortex-M3 Debug Monitor Interrupt                 */PendSV_IRQn                 = -2,     /*!< 14 Cortex-M3 Pend SV Interrupt                       */SysTick_IRQn                = -1,     /*!< 15 Cortex-M3 System Tick Interrupt                   *//******  STM32 specific Interrupt Numbers *********************************************************/WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                            */PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detection Interrupt            */TAMPER_IRQn                 = 2,      /*!< Tamper Interrupt                                     */RTC_IRQn                    = 3,      /*!< RTC global Interrupt                                 */FLASH_IRQn                  = 4,      /*!< FLASH global Interrupt                               */RCC_IRQn                    = 5,      /*!< RCC global Interrupt                                 */EXTI0_IRQn                  = 6,      /*!< EXTI Line0 Interrupt                                 */EXTI1_IRQn                  = 7,      /*!< EXTI Line1 Interrupt                                 */EXTI2_IRQn                  = 8,      /*!< EXTI Line2 Interrupt                                 */EXTI3_IRQn                  = 9,      /*!< EXTI Line3 Interrupt                                 */EXTI4_IRQn                  = 10,     /*!< EXTI Line4 Interrupt                                 */DMA1_Channel1_IRQn          = 11,     /*!< DMA1 Channel 1 global Interrupt                      */DMA1_Channel2_IRQn          = 12,     /*!< DMA1 Channel 2 global Interrupt                      */DMA1_Channel3_IRQn          = 13,     /*!< DMA1 Channel 3 global Interrupt                      */DMA1_Channel4_IRQn          = 14,     /*!< DMA1 Channel 4 global Interrupt                      */DMA1_Channel5_IRQn          = 15,     /*!< DMA1 Channel 5 global Interrupt                      */DMA1_Channel6_IRQn          = 16,     /*!< DMA1 Channel 6 global Interrupt                      */DMA1_Channel7_IRQn          = 17,     /*!< DMA1 Channel 7 global Interrupt                      */#ifdef STM32F10X_LD...#endif /* STM32F10X_LD */  #ifdef STM32F10X_LD_VL...#endif /* STM32F10X_LD_VL */#ifdef STM32F10X_MD...#endif /* STM32F10X_MD */  #ifdef STM32F10X_MD_VL...#endif /* STM32F10X_MD_VL */#ifdef STM32F10X_HD...#endif /* STM32F10X_HD */  .........} IRQn_Type;