S3C2410中断机制及相关寄存器介绍
ARB_MODE6 | [6] | Arbiter 6 group priority rotate enable 0:Priority does not rotate,1:Priority rotate enable |
ARB_MODE5 | [5] | Arbiter 5 group priority rotate enable 0:Priority does not rotate,1:Priority rotate enable |
ARB_MODE4 | [4] | Arbiter 4 group priority rotate enable 0:Priority does not rotate,1:Priority rotate enable |
ARB_MODE3 | [3] | Arbiter 3 group priority rotate enable 0:Priority does not rotate,1:Priority rotate enable |
ARB_MODE2 | [2] | Arbiter 2 group priority rotate enable 0:Priority does not rotate,1:Priority rotate enable |
ARB_MODE1 | [1] | Arbiter 1 group priority rotate enable 0:Priority does not rotate,1:Priority rotate enable |
ARB_MODE0 | [0] | Arbiter 0 group priority rotate enable 0:Priority does not rotate,1:Priority rotate enable |
表1-7 PRIORITY寄存器
表1-7是PRIORITY寄存器各个位的参数表。从表上我们可以知道PRIORITY寄存器内部各个位被分为两种类型,一种是ARB_MODE,另一种为ARB_SEL, ARB_MODE类型有5组,分别对应ARBITER(2~6),ARB_SEL类型有7组,分别对应ARBITER(0~6)。
以ARBITER2为例,我们来看一下PRIORITY寄存器中ARB_SEL, ARB_MODE之间的相互关系。首先我们看到ARBITER2寄存器管理的该组中断里包括了6个中断,分别是INT_TIMER0,INT_TIMER1,INT_TIMER2,INT_TIMER3,INT_TIMER4,INT_UART2,它们的默认中断请求号分别为REQ0,REQ1,REQ2,REQ3,REQ4,REQ5。我们先看PRIORITY寄存器中的ARB_SEL2,该参数由两个位组成,初始值为00。从该表可以看出00定义了一个顺序0-1-2-3-4-5,这个顺序就是这组中断组的优先级排列,这个顺序指明了以中断请求号为0(REQ0)的INT_TIMER0具有最高的中断优先级,其次是INT_TIMER1,INT_TIMER2…。假设现在ARB_SEL2的值被我们设置为01。则一个新的优先级次序将被使用,01对应的优先级次序为0-2-3-4-1-5,从中可以看出优先级最高和最低的中断请求和之前没有变化,但本来处于第2优先级的INT_TIMER1中断现在变成了第5优先级。从ARB_SEL2被设置为00,01,10,11各个值所出现的情况可以看出,除了最高和最低的优先级不变以外,其他各个中断的优先级其实是在做一个旋转排列(rotate)。为了达到对各个中断平等对待这一目标,我们可以让优先级次序在每个中断请求被处理完之后自动进行一次旋转,如何自动让它旋转呢?我们可以通过设置ARB_MODE2位达到这个目的,该位置1代表开启对应中断组的优先级次序自动旋转,0则为关闭,按固定的次序排列优先级列表。
(5)中断待决寄存器INTPND
Each of the 32 bits in the interrupt pending register shows whether the corresponding interrupt request, which is unmasked and waits for the interrupt to be serviced, has the highest priority .Since the INTPND register is located after the priority logic, only one bit can be set to 1, and that interrupt request generates IRQ to CPU.In interrupt service routine for IRQ, you can read this register to determine which interrupt source is serviced among the 32 sources.
Like the SRCPND register,this register has to be cleared in the interrupt service routine after clearing the SRCPND register. We can clear a specific bit of the INTPND register by writing a data to this register.It clears only the bit positions of the INTPND register corresponding to those set to one in the data. The bit positions corresponding to those that are set to 0 in the data remains as they are.
INTPND的详细信息如表1-8所示:
INTPND | BIT | 描述 |
INT_ADC | [31] | 0:Not requested,1:Requested |
INT_RTC | [30] | 0:Not requested,1:Requested |
INT_SPI1 | [29] | 0:Not requested,1:Requested |
INT_UART0 | [28] | 0:Not requested,1:Requested |
INT_IIC | [27] | 0:Not requested,1:Requested |
INT_USBH | [26] | 0:Not requested,1:Requested |
INT_USBD | [25] | 0:Not requested,1:Requested |
Reserved | [24] | Not used |
INT_UART1 | [23] | 0:Not requested,1:Requested |
INT_SPI0 | [22] | 0:Not requested,1:Requested |
INT_SDI | [21] | 0:Not requested,1:Requested |
INT_DMA3 | [20] | 0:Not requested,1:Requested |
INT_DMA2 | [19] | 0:Not requested,1:Requested |
INT_DMA1 | [18] | 0:Not r |
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