ARM启动代码注释

BMSK

ldr r1,=0x3ff ;all sub interrupt disable

str r1,[r0]

;To reduce PLL lock time, adjust the LOCKTIME register.

ldr r0,=LOCKTIME

ldr r1,=0xffffff

str r1,[r0]

;Configure MPLL

ldr r0,=MPLLCON

ldr r1,=((M_Mdiv<12)+(M_Pdiv<4)+M_Sdiv) ;Fin=12MHz,Fout=50MHz

str r1,[r0]

;设置存储器控制寄存器。

;Set memory control registers

adr r0, SMRDATA

ldr r1,=BWSCON ;BWSCON Address

add r2, r0, #52 ;End address of SMRDATA一共13个寄存器

0

ldr r3, [r0], #4

str r3, [r1], #4

cmp r2, r0

bne %B0

;禁止Icache和Dcache，禁止MMU

;IMPORT MMU_DisableICache

;bl MMU_DisableICache ;

;IMPORT MMU_DisableDCache

;bl MMU_DisableDCache ;

;IMPORT MMU_InvalidateICache

;bl MMU_InvalidateICache ;

;IMPORT MMU_DisableMMU

;bl MMU_DisableMMU ;

;初始化堆栈

;Initialize stacks

bl InitStacks

;建立IRQ中断

; Setup IRQ handler

ldr r0,=HandleIRQ ;This routine is needed

ldr r1,=IsrIRQ ;if there isnt subs pc,lr,#4 at 0x18, 0x1c

str r1,[r0]

;===========================================================

adr r0, ResetEntry

ldr r2, BaseOfROM

cmp r0, r2

ldreq r0, TopOfROM

beq InitRam

ldr r3, TopOfROM

;将RO区域的代码copy到RW域中并且将ZI区域初始化为0。

0

ldmia r0!, {r4-r7}

stmia r2!, {r4-r7}

cmp r2, r3

bcc %B0

sub r2, r2, r3

sub r0, r0, r2

InitRam

ldr r2, BaseOfBSS

ldr r3, BaseOfZero

0

cmp r2, r3 ;copy 初始化代码

ldrcc r1, [r0], #4

strcc r1, [r2], #4

bcc %B0

mov r0, #0 ;初始化ZI区域为0

ldr r3, EndOfBSS

1

cmp r2, r3

strcc r0, [r2], #4

bcc %B1

bl Main ;bl Main ;Dont use main() because ......

b .

;堆栈初始化

;function initializing stacks

InitStacks

;Dont use DRAM,such as stmfd,ldmfd......

;SVCstack is initialized before

;Under toolkit ver 2.5, msr cpsr,r1 can be used instead of msr cpsr_cxsf,r1

;UndefMode堆栈

mrs r0,cpsr

bic r0,r0,#MODEMASK

orr r1,r0,#UNDEFMODE|NOINT

msr cpsr_cxsf,r1 ;UndefMode

ldr sp,=UndefStack

;AbortMode堆栈

orr r1,r0,#ABORTMODE|NOINT

msr cpsr_cxsf,r1 ;AbortMode

ldr sp,=AbortStack

;IRQMode堆栈

orr r1,r0,#IRQMODE|NOINT

msr cpsr_cxsf,r1 ;IRQMode

ldr sp,=IRQStack

;FIQMode堆栈

orr r1,r0,#FIQMODE|NOINT

msr cpsr_cxsf,r1 ;FIQMode

ldr sp,=FIQStack

;SVCMode堆栈

bic r0,r0,#MODEMASK|NOINT

orr r1,r0,#SVCMODE

msr cpsr_cxsf,r1 ;SVCMode

ldr sp,=SVCStack

;USER mode has not be initialized.

mov pc,lr

;The LR register wont be valid if the current mode is not SVC mode.

LTORG ;声明一个数据缓冲池的开始

SMRDATA DATA

; Memory configuration should be optimized for best performance

; The following parameter is not optimized.

; Memory access cycle parameter strategy

; 1) The memory settings is safe parameters even at HCLK=75Mhz.

; 2) SDRAM refresh period is for HCLK=75Mhz.

DCD (0+(B1_BWSCON<4)+(B2_BWSCON<8)+(B3_BWSCON<12)+(B4_BWSCON<16)+(B5_BWSCON<20)+(B6_BWSCON<24)+(B7_BWSCON<28));BWSCON=0x2211D110

DCD ((B0_Tacs<13)+(B0_Tcos<11)+(B0_Tacc<8)+(B0_Tcoh<6)+(B0_Tah<4)+(B0_Tacp<2)+(B0_PMC)) ;GCS0 BANK0CON=0x0700

DCD ((B1_Tacs<13)+(B1_Tcos<11)+(B1_Tacc<8)+(B1_Tcoh<6)+(B1_Tah<4)+(B1_Tacp<2)+(B1_PMC)) ;GCS1 BANK1CON=0x7FFC

DCD ((B2_Tacs<13)+(B2_Tcos<11)+(B2_Tacc<8)+(B2_Tcoh<6)+(B2_Tah<4)+(B2_Tacp<2)+(B2_PMC)) ;GCS2 BANKCON2=0x0700

DCD 0x1f7c;((B3_Tacs<13)+(B3_Tcos<11)+(B3_Tacc<8)+(B3_Tcoh<6)+(B3_Tah<4)+(B3_Tacp<2)+(B3_PMC)) ;GCS3 BANKCON3=0x0700

DCD ((B4_Tacs<13)+(B4_Tcos<11)+(B4_Tacc<8)+(B4_Tcoh<6)+(B4_Tah<4)+(B4_Tacp<2)+(B4_PMC)) ;GCS4 BANKCON4=0x0700

DCD ((B5_Tacs<13)+(B5_Tcos<11)+(B5_Tacc<8)+(B5_Tcoh<6)+(B5_Tah<4)+(B5_Tacp<2)+(B5_PMC)) ;GCS5 BANKCON5=0x0700

DCD ((B6_MT<15)+(B6_Trcd<2)+(B6_SCAN)) ;GCS6 BANKCON6=0x18005

DCD ((B7_MT<15)+(B7_Trcd<2)+(B7_SCAN)) ;GCS7 BANKCON7=0x18005

DCD ((REFEN<23)+(TREFMD<22)+(Trp<20)+(Trc<18)+(Tchr<16)+REFCNT) ;REFRESH=0x008E0459

DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128M ;BANKSIZE=0x32

DCD 0x30 ;MRSR6 CL=3clk ;MRSRB6=0x30

DCD 0x30 ;MRSR7 ;MRSRB7=0x30

BaseOfROM DCD |Image$$RO$$Base|

TopOfROM DCD |Image$$RO$$Limit|

BaseOfBSS DCD |Image$$RW$$Base|

BaseOfZero DCD |Image$$ZI$$Base|

EndOfBSS DCD |Image$$ZI$$Limit|

ALIGN ;通过添加补丁字节使当前位置满足一定的对齐方式

;可读写的数据段

AREA RamData, DATA, READWRITE

;^=MAP:定义一个结构化的内存表（storage map）的首地址，地址为0x33ff8000

^ _ISR_STARTADDRESS ;0x33ff8000

HandleReset # 4 ;#--Field：定义一个结构化内存表中的数据域，该域为4个字节

HandleUndef # 4

HandleSWI # 4

HandlePabort # 4

HandleDabort # 4

HandleReserved # 4

HandleIRQ # 4

HandleFIQ # 4

;Dont use the label IntVectorTable,

;The value of IntVectorTable is different with the address you think it may be.

;IntVectorTable

HandleEINT0 # 4

HandleEINT1 # 4

HandleEINT2 # 4

HandleEINT3 # 4

HandleEINT4_7 # 4

HandleEINT8_23 # 4

HandleRSV6 # 4

HandleBATFLT # 4

HandleTICK # 4

HandleWDT # 4

HandleTIMER0 # 4

HandleTIMER1 # 4

HandleTIMER2 # 4

HandleTIMER3 # 4

HandleTIMER4 # 4

HandleUART2 # 4

HandleLCD # 4

Han