ARM启动代码注释

ALSE}

　　 ;rGPFDAT = (rGPFDAT & ~(0xf<4)) | ((~data & 0xf)<4);

　　 ;Led_Display

ldrr0,=GPFCON

ldrr1,=0x5500

strr1,[r0]

ldrr0,=GPFDAT

ldrr1,=0x10

strr1,[r0]

]

;To reduce PLL lock time, adjust the LOCKTIME register.

ldrr0,=LOCKTIME

ldrr1,=0xffffff

strr1,[r0]

[ PLL_ON_START

;Configure MPLL

ldrr0,=MPLLCON;//设置时钟频率

ldrr1,=((M_Mdiv<12)+(M_Pdiv<4)+M_Sdiv) ;Fin=12MHz,Fout=50MHz

strr1,[r0]

]

;Check if the boot is caused by the wake-up from POWER_OFF mode.

ldrr1,=GSTATUS2

ldrr0,[r1]

tstr0,#0x2

;In case of the wake-up from POWER_OFF mode, go to POWER_OFF_WAKEUP handler.

bneWAKEUP_POWER_OFF

EXPORT StartPointAfterPowerOffWakeUp

StartPointAfterPowerOffWakeUp

;Set memory control registers

ldrr0,=SMRDATA

ldrr1,=BWSCON ;BWSCON Address

addr2, r0, #52 ;End address of SMRDATA

0

ldrr3, [r0], #4

strr3, [r1], #4

cmpr2, r0

bne%B0

;Initialize stacks

blInitStacks

;Setup IRQ handler

ldrr0,=HandleIRQ ;This routine is needed

ldrr1,=IsrIRQ ;if there isnt subs pc,lr,#4 at 0x18, 0x1c

strr1,[r0]

　　　　　　 ;Copy and paste RW data/zero initialized data

ldrr0, =|Image$$RO$$Limit| ; Get pointer to ROM data

ldrr1, =|Image$$RW$$Base| ; and RAM copy

ldrr3, =|Image$$ZI$$Base|

;Zero init base => top of initialised data

cmpr0, r1 ;Check that they are different

beq%F2

1

cmpr1, r3 ;Copy init data

ldrccr2, [r0], #4 ;--> LDRCC r2, [r0] + ADD r0, r0, #4

strccr2, [r1], #4 ;--> STRCC r2, [r1] + ADD r1, r1, #4

bcc%B1

2

ldrr1, =|Image$$ZI$$Limit| ;Top of zero init segment

movr2, #0

3

cmpr3, r1 ; Zero init

strccr2, [r3], #4

bcc%B3

[ :LNOT:THUMBCODE

blMain ;Dont use main() because ......

b.

]

[ THUMBCODE ;for start-up code for Thumb mode

orrlr,pc,#1

bxlr

CODE16

blMain ;Dont use main() because ......

b.

CODE32

]

;//function initializing stacks 初始化堆栈

InitStacks

;Dont use DRAM,such as stmfd,ldmfd......

;SVCstack is initialized before

;Under toolkit ver 2.5, msr cpsr,r1 can be used instead of msr cpsr_cxsf,r1

mrsr0,cpsr

bicr0,r0,#MODEMASK

orrr1,r0,#UNDEFMODE|NOINT

msrcpsr_cxsf,r1　　　　;UndefMode

ldrsp,=UndefStack

orrr1,r0,#ABORTMODE|NOINT

msrcpsr_cxsf,r1　　　　;AbortMode

ldrsp,=AbortStack

orrr1,r0,#IRQMODE|NOINT

msrcpsr_cxsf,r1　　　　;IRQMode

ldrsp,=IRQStack

orrr1,r0,#FIQMODE|NOINT

msrcpsr_cxsf,r1　　　　;FIQMode

ldrsp,=FIQStack

bicr0,r0,#MODEMASK|NOINT

orrr1,r0,#SVCMODE

msrcpsr_cxsf,r1　　　　;SVCMode

ldrsp,=SVCStack

;USER mode has not be initialized.

movpc,lr

;The LR register wont be valid if the current mode is not SVC mode.

LTORG

SMRDATA DATA 在初始化堆栈前，先队内存初始化

;// Memory configuration should be optimized for best performance

;// The following parameter is not optimized.

;// Memory access cycle parameter strategy

;// 1) The memory settings is safe parameters even at HCLK="75Mhz".

;// 2) SDRAM refresh period is for HCLK="75Mhz".

DCD (0+(B1_BWSCON<4)+(B2_BWSCON<8)+(B3_BWSCON<12)+(B4_BWSCON<16)+(B5_BWSCON<20)+(B6_BWSCON<24)+(B7_BWSCON<28))

DCD ((B0_Tacs<13)+(B0_Tcos<11)+(B0_Tacc<8)+(B0_Tcoh<6)+(B0_Tah<4)+(B0_Tacp<2)+(B0_PMC)) ;GCS0

DCD ((B1_Tacs<13)+(B1_Tcos<11)+(B1_Tacc<8)+(B1_Tcoh<6)+(B1_Tah<4)+(B1_Tacp<2)+(B1_PMC)) ;GCS1

DCD ((B2_Tacs<13)+(B2_Tcos<11)+(B2_Tacc<8)+(B2_Tcoh<6)+(B2_Tah<4)+(B2_Tacp<2)+(B2_PMC)) ;GCS2

DCD ((B3_Tacs<13)+(B3_Tcos<11)+(B3_Tacc<8)+(B3_Tcoh<6)+(B3_Tah<4)+(B3_Tacp<2)+(B3_PMC)) ;GCS3

DCD ((B4_Tacs<13)+(B4_Tcos<11)+(B4_Tacc<8)+(B4_Tcoh<6)+(B4_Tah<4)+(B4_Tacp<2)+(B4_PMC)) ;GCS4

DCD ((B5_Tacs<13)+(B5_Tcos<11)+(B5_Tacc<8)+(B5_Tcoh<6)+(B5_Tah<4)+(B5_Tacp<2)+(B5_PMC)) ;GCS5

DCD ((B6_MT<15)+(B6_Trcd<2)+(B6_SCAN)) ;GCS6

DCD ((B7_MT<15)+(B7_Trcd<2)+(B7_SCAN)) ;GCS7

DCD ((REFEN<23)+(TREFMD<22)+(Trp<20)+(Trc<18)+(Tchr<16)+REFCNT)

DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128M

DCD 0x30 ;MRSR6 CL="3clk"

DCD 0x30 ;MRSR7

; //DCD 0x20 ;MRSR6 CL="2clk"

; //DCD 0x20 ;MRSR7

ALIGN

AREA RamData, DATA, READWRITE

^ _ISR_STARTADDRESS

HandleReset # 4

HandleUndef # 4

HandleSWI # 4

HandlePabort # 4

HandleDabort # 4

HandleReserved # 4

HandleIRQ # 4

HandleFIQ # 4

;//Dont use the label IntVectorTable,

;//The value of IntVectorTable is different with the address you think it may be.

;//IntVectorTable

HandleEINT0 # 4

HandleEINT1 # 4

HandleEINT2 # 4

HandleEINT3 # 4

HandleEINT4_7 # 4

HandleEINT8_23# 4

HandleRSV6 # 4

HandleBATFLT # 4

HandleTICK # 4

HandleWDT # 4

HandleTIMER0 # 4

HandleTIMER1 # 4

HandleTIMER2 # 4

HandleTIMER3 # 4

HandleTIMER4 # 4

HandleUART2 # 4

HandleLCD # 4

HandleDMA0 # 4

HandleDMA1 # 4

HandleDMA2 # 4

HandleDMA3 # 4

HandleMMC # 4

HandleSPI0 # 4

HandleUART1 # 4

HandleRSV24 # 4

HandleUSBD # 4

HandleUSBH # 4

HandleIIC # 4

HandleUART0 # 4

HandleSPI1 # 4