s3c2440头文件之2440addr.h

//=============================================================================

// File Name : 2440addr.h
// Function : S3C2440 Define Address Register
// History
// 0.0 : Programming start (February 15,2002) -> SOP
// Revision: 03.11.2003 ver 0.0Attatched for 2440
//=============================================================================

#ifndef __2440ADDR_H__
#define __2440ADDR_H__

#ifdef __cplusplus
extern "C" {
#endif

#include "option.h"

// Memory control
#define rBWSCON (*(volatile unsigned *)0x48000000)//Bus width & wait status
#define rBANKCON0 (*(volatile unsigned *)0x48000004)//Boot ROM control
#define rBANKCON1 (*(volatile unsigned *)0x48000008)//BANK1 control
#define rBANKCON2 (*(volatile unsigned *)0x4800000c)//BANK2 cControl
#define rBANKCON3 (*(volatile unsigned *)0x48000010)//BANK3 control
#define rBANKCON4 (*(volatile unsigned *)0x48000014)//BANK4 control
#define rBANKCON5 (*(volatile unsigned *)0x48000018)//BANK5 control
#define rBANKCON6 (*(volatile unsigned *)0x4800001c)//BANK6 control
#define rBANKCON7 (*(volatile unsigned *)0x48000020)//BANK7 control
#define rREFRESH (*(volatile unsigned *)0x48000024)//DRAM/SDRAM refresh
#define rBANKSIZE (*(volatile unsigned *)0x48000028)//Flexible Bank Size
#define rMRSRB6 (*(volatile unsigned *)0x4800002c)//Mode register set for SDRAM
#define rMRSRB7 (*(volatile unsigned *)0x48000030)//Mode register set for SDRAM

// USB Host

// INTERRUPT
#define rSRCPND (*(volatile unsigned *)0x4a000000)//Interrupt request status
#define rINTMOD (*(volatile unsigned *)0x4a000004)//Interrupt mode control
#define rINTMSK (*(volatile unsigned *)0x4a000008)//Interrupt mask control
#define rPRIORITY (*(volatile unsigned *)0x4a00000c)//IRQ priority control
#define rINTPND (*(volatile unsigned *)0x4a000010)//Interrupt request status
#define rINTOFFSET (*(volatile unsigned *)0x4a000014)//Interruot request source offset
#define rSUBSRCPND (*(volatile unsigned *)0x4a000018)//Sub source pending
#define rINTSUBMSK (*(volatile unsigned *)0x4a00001c)//Interrupt sub mask

// DMA
#define rDISRC0 (*(volatile unsigned *)0x4b000000)//DMA 0 Initial source
#define rDISRCC0 (*(volatile unsigned *)0x4b000004)//DMA 0 Initial source control
#define rDIDST0 (*(volatile unsigned *)0x4b000008)//DMA 0 Initial Destination
#define rDIDSTC0 (*(volatile unsigned *)0x4b00000c)//DMA 0 Initial Destination control
#define rDCON0 (*(volatile unsigned *)0x4b000010)//DMA 0 Control
#define rDSTAT0 (*(volatile unsigned *)0x4b000014)//DMA 0 Status
#define rDCSRC0 (*(volatile unsigned *)0x4b000018)//DMA 0 Current source
#define rDCDST0 (*(volatile unsigned *)0x4b00001c)//DMA 0 Current destination
#define rDMASKTRIG0 (*(volatile unsigned *)0x4b000020)//DMA 0 Mask trigger

#define rDISRC1 (*(volatile unsigned *)0x4b000040)//DMA 1 Initial source
#define rDISRCC1 (*(volatile unsigned *)0x4b000044)//DMA 1 Initial source control
#define rDIDST1 (*(volatile unsigned *)0x4b000048)//DMA 1 Initial Destination
#define rDIDSTC1 (*(volatile unsigned *)0x4b00004c)//DMA 1 Initial Destination control
#define rDCON1 (*(volatile unsigned *)0x4b000050)//DMA 1 Control
#define rDSTAT1 (*(volatile unsigned *)0x4b000054)//DMA 1 Status
#define rDCSRC1 (*(volatile unsigned *)0x4b000058)//DMA 1 Current source
#define rDCDST1 (*(volatile unsigned *)0x4b00005c)//DMA 1 Current destination
#define rDMASKTRIG1 (*(volatile unsigned *)0x4b000060)//DMA 1 Mask trigger

#define rDISRC2 (*(volatile unsigned *)0x4b000080)//DMA 2 Initial source
#define rDISRCC2 (*(volatile unsigned *)0x4b000084)//DMA 2 Initial source control
#define rDIDST2 (*(volatile unsigned *)0x4b000088)//DMA 2 Initial Destination
#define rDIDSTC2 (*(volatile unsigned *)0x4b00008c)//DMA 2 Initial Destination control
#define rDCON2 (*(volatile unsigned *)0x4b000090)//DMA 2 Control
#define rDSTAT2 (*(volatile unsigned *)0x4b000094)//DMA 2 Status
#define rDCSRC2 (*(volatile unsigned *)0x4b000098)//DMA 2 Current source
#define rDCDST2 (*(volatile unsigned *)0x4b00009c)//DMA 2 Current destination
#define rDMASKTRIG2 (*(volatile unsigned *)0x4b0000a0)//DMA 2 Mask trigger