s3c2440头文件之2440addr.h

#ifdef __BIG_ENDIAN
#define rUTXH0 (*(volatile unsigned char *)0x50000023)//UART 0 Transmission Hold
#define rURXH0 (*(volatile unsigned char *)0x50000027)//UART 0 Receive buffer
#define rUTXH1 (*(volatile unsigned char *)0x50004023)//UART 1 Transmission Hold
#define rURXH1 (*(volatile unsigned char *)0x50004027)//UART 1 Receive buffer
#define rUTXH2 (*(volatile unsigned char *)0x50008023)//UART 2 Transmission Hold
#define rURXH2 (*(volatile unsigned char *)0x50008027)//UART 2 Receive buffer

#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000023)=(unsigned char)(ch)
#define RdURXH0() (*(volatile unsigned char *)0x50000027)
#define WrUTXH1(ch) (*(volatile unsigned char *)0x50004023)=(unsigned char)(ch)
#define RdURXH1() (*(volatile unsigned char *)0x50004027)
#define WrUTXH2(ch) (*(volatile unsigned char *)0x50008023)=(unsigned char)(ch)
#define RdURXH2() (*(volatile unsigned char *)0x50008027)

#define UTXH0 (0x50000020+3) //Byte_access address by DMA
#define URXH0 (0x50000024+3)
#define UTXH1 (0x50004020+3)
#define URXH1 (0x50004024+3)
#define UTXH2 (0x50008020+3)
#define URXH2 (0x50008024+3)

#else //Little Endian
#define rUTXH0 (*(volatile unsigned char *)0x50000020)//UART 0 Transmission Hold
#define rURXH0 (*(volatile unsigned char *)0x50000024)//UART 0 Receive buffer
#define rUTXH1 (*(volatile unsigned char *)0x50004020)//UART 1 Transmission Hold
#define rURXH1 (*(volatile unsigned char *)0x50004024)//UART 1 Receive buffer
#define rUTXH2 (*(volatile unsigned char *)0x50008020)//UART 2 Transmission Hold
#define rURXH2 (*(volatile unsigned char *)0x50008024)//UART 2 Receive buffer

#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000020)=(unsigned char)(ch)
#define RdURXH0() (*(volatile unsigned char *)0x50000024)
#define WrUTXH1(ch) (*(volatile unsigned char *)0x50004020)=(unsigned char)(ch)
#define RdURXH1() (*(volatile unsigned char *)0x50004024)
#define WrUTXH2(ch) (*(volatile unsigned char *)0x50008020)=(unsigned char)(ch)
#define RdURXH2() (*(volatile unsigned char *)0x50008024)

#define UTXH0 (0x50000020) //Byte_access address by DMA
#define URXH0 (0x50000024)
#define UTXH1 (0x50004020)
#define URXH1 (0x50004024)
#define UTXH2 (0x50008020)
#define URXH2 (0x50008024)
#endif

// PWM TIMER
#define rTCFG0 (*(volatile unsigned *)0x51000000)//Timer 0 configuration
#define rTCFG1 (*(volatile unsigned *)0x51000004)//Timer 1 configuration
#define rTCON (*(volatile unsigned *)0x51000008)//Timer control
#define rTCNTB0 (*(volatile unsigned *)0x5100000c)//Timer count buffer 0
#define rTCMPB0 (*(volatile unsigned *)0x51000010)//Timer compare buffer 0
#define rTCNTO0 (*(volatile unsigned *)0x51000014)//Timer count observation 0
#define rTCNTB1 (*(volatile unsigned *)0x51000018)//Timer count buffer 1
#define rTCMPB1 (*(volatile unsigned *)0x5100001c)//Timer compare buffer 1
#define rTCNTO1 (*(volatile unsigned *)0x51000020)//Timer count observation 1
#define rTCNTB2 (*(volatile unsigned *)0x51000024)//Timer count buffer 2
#define rTCMPB2 (*(volatile unsigned *)0x51000028)//Timer compare buffer 2
#define rTCNTO2 (*(volatile unsigned *)0x5100002c)//Timer count observation 2
#define rTCNTB3 (*(volatile unsigned *)0x51000030)//Timer count buffer 3
#define rTCMPB3 (*(volatile unsigned *)0x51000034)//Timer compare buffer 3
#define rTCNTO3 (*(volatile unsigned *)0x51000038)//Timer count observation 3
#define rTCNTB4 (*(volatile unsigned *)0x5100003c)//Timer count buffer 4
#define rTCNTO4 (*(volatile unsigned *)0x51000040)//Timer count observation 4

// USB DEVICE
#ifdef __BIG_ENDIAN

#define rFUNC_ADDR_REG (*(volatile unsigned char *)0x52000143)//Function address
#define rPWR_REG (*(volatile unsigned char *)0x52000147)//Power management
#define rEP_INT_REG (*(volatile unsigned char *)0x5200014b)//EP Interrupt pending and clear
#define rUSB_INT_REG (*(volatile unsigned char *)0x5200015b)//USB Interrupt pending and clear
#define rEP_INT_EN_REG (*(volatile unsigned char *)0x5200015f)//Interrupt enable
#define rUSB_INT_EN_REG (*(volatile unsigned char *)0x5200016f)
#define rFRAME_NUM1_REG (*(volatile unsigned char *)0x52000173)//Frame number lower byte
#define rFRAME_NUM2_REG (*(volatile unsigned char *)0x52000177)//Frame number higher byte
#define rINDEX_REG (*(volatile unsigned char *)0x5200017b)//Register index
#define rMAXP_REG (*(volatile unsigned char *)0x52000183)//Endpoint max packet
#define rEP0_CSR (*(volatile unsigned char *)0x52000187)//Endpoint 0 status
#define rIN_CSR1_REG (*(volatile unsigned char *)0x52000187)//In endpoint control status
#define rIN_CSR2_REG (*(volatile unsigned char *)0x5200018b)
#define rOUT_CSR1_REG (*(volatile unsigned char *)0x52000193)//Out endpoint control status
#define rOUT_CSR2_REG (*(volatile unsigned char *)0x52000197)
#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x5200019b)//Endpoint out write count
#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019f)
#define rEP0_FIFO (*(volatile unsigned char *)0x520001c3)//Endpoint 0 FIFO
#define rEP1_FIFO (*(volatile unsigned char *)0x520001c7)//Endpoint 1 FIFO
#define rEP2_FIFO (*(volatile unsigned char *)0x520001cb)//Endpoint 2 FIFO
#define rEP3_FIFO (*(volatile unsigned char *)0x520001cf)//Endpoint 3 FIFO
#define rEP4_FIFO (*(volatile unsigned char *)0x520001d3)//Endpoint 4 FIFO
#define rEP1_DMA_CON (*(volatile unsigned char *)0x52000203)//EP1 DMA interface control
#define rEP1_DMA_UNIT (*(volatile unsigned char *)0x52000207)//EP1 DMA Tx unit counter
#define rEP1_DMA_FIFO (*(volatile unsigned char *)0x5200020b)//EP1 DMA Tx FIFO counter
#define rEP1_DMA_TTC_L (*(volatile unsigned char *)0x5200020f)//EP1 DMA total Tx counter
#define rEP1_DMA_TTC_M (*(volatile unsigned char *)0x52000213)
#define rEP1_DMA_TTC_H (*(volatile unsigned char *)0x52000217)
#define rEP2_DMA_CON (*(volatile unsigned char *)0x5200021b)//EP2 DMA interface control
#define rEP2_DMA_UNIT (*(volatile unsigned char *)0x5200021f)//EP2 DMA Tx unit counter
#define rEP2_DMA_FIFO (*(volatile unsigned char *)0x52000223)//EP2 DMA Tx FIFO counter
#define rEP2_DMA_TTC_L (*(volatile unsigned char *)0x52000227)//EP2 DMA total Tx counter
#define rEP2_DMA_TTC_M (*(volatile unsigned char *)0x5200022b)
#define rEP2_DMA_TTC_H (*(volatile unsigned char *)0x5200022f)
#define rEP3_DMA_CON (*(volatile unsigned char *)0x52000243)//EP3 DMA interface control
#define rEP3_DMA_UNIT (*(volatile unsigned char *)0x52000247)//EP3 DMA Tx unit counter
#define rEP3_DMA_FIFO (*(volatile unsigned char *)0x5200024b)//EP3 DMA Tx FIFO counter
#define rEP3_DMA_TTC_L (*(volatile unsigned char *)0x5200024f)//EP3 DMA total Tx counter
#define rEP3_DMA_TTC_M (*(volatile unsigned char *)0x52000253)
#define rEP3_DMA_TTC_H (*(volatile unsigned char *)0x52000257)
#define rEP4_DMA_CON (*(volatile unsigned char *)0x5200025b)//EP4 DMA interface control
#define rEP4_DMA_UNIT (*(volatile unsigned char *)0x5200025f)//EP4 DMA Tx unit counter
#define rEP4_DMA_FIFO (*(volatile unsigned char *)0x52000263)//EP4 DMA Tx FIFO counter
#define rEP4_DMA_TTC_L (*(volatile unsigned char *)0x52000267)//EP4 DMA total Tx counter
#define rEP4_DMA_TTC_M (*(volatile unsigned char *)0x5200026b)
#define rEP4_DMA_TTC_H (*(volatile unsigned char *)0x5200026f)