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单片机

时间:11-07 来源:互联网 点击:

Z80CTC, Z8430
Z80 Counter-Timer Circuit.
+-----+--+-----+
D4 |1 +--+ 28| D3
D5 |2 27| D2
D6 |3 26| D1
D7 |4 25| D0
GND |5 24| VCC
/RD |6 23| CLK0 TRG0
ZC0 TO0 |7 Z8430 22| CLK1 TRG1
ZC1 TO1 |8 CTC 21| CLK2 TRG2
ZC2 TO2 |9 20| CLK3 TRG3
/IORQ |10 19| A1
IEO |11 18| A0
/INT |12 17| /RST
IEI |13 16| /CE
/M1 |14 15| CLK
+--------------+


Z80DART, Z8470
Z80 dual async/sync serial I/O.
Z8470 (DART) has no synchronous capabilities.
+-----+--+-----+
D1 |1 +--+ 40| D0
D3 |2 39| D2
D5 |3 38| D4
D7 |4 37| D6
/INT |5 36| /IORQ
IEI |6 35| /CE
IEO |7 34| A0 B/A
/M1 |8 33| A1 C/D
VCC |9 32| /RD
/W_RDYA |10 Z8440 31| GND
/SYNCA |11 SIO-0 30| /W_RDYB
RxDA |12 29| /SYNCB
/RxCA |13 28| RxDB
/TxCA |14 27| /RxTxCB
TxDA |15 26| TxDB
/DTRA |16 25| /DTRB
/RTSA |17 24| /RTSB
/CTSA |18 23| /CTSB
/DCDA |19 22| /DCDB
CLK |20 21| /RST
+--------------+


Z80DMA, Z8410
Z80 DMA controller.
+-----+--+-----+
A5 |1 +--+ 40| A6
A4 |2 39| A7
A3 |3 38| IEI
A2 |4 37| /INT /PULSE
A1 |5 36| IEO
A0 |6 35| D0
CLK |7 34| D1
/WR |8 33| D2
/RD |9 32| D3
/IORQ |10 Z8410 31| D4
VCC |11 DMA 30| GND
/MREQ |12 29| D5
/BAO |13 28| D6
/BAI |14 27| D7
/BUSRQ |15 26| /M1
/CE /WAIT |16 25| RDY
A15 |17 24| A8
A14 |18 23| A9
A13 |19 22| A10
A12 |20 21| A11
+--------------+


Z80PIO, Z8420
Z80 parallel I/O.
+-----+--+-----+
D2 |1 +--+ 40| D3
D7 |2 39| D4
D6 |3 38| D5
/CE |4 37| /M1
C/D A1 |5 36| /IORQ
B/A A0 |6 35| /RD
PA7 |7 34| PB7
PA6 |8 33| PB6
PA5 |9 32| PB5
PA4 |10 Z8420 31| PB4
GND |11 PIO 30| PB3
PA3 |12 29| PB2
PA2 |13 28| PB1
PA1 |14 27| PB0
PA0 |15 26| VCC
/ASTB |16 25| CLK
/BSTB |17 24| IEI
ARDY |18 23| /INT
D0 |19 22| IEO
D1 |20 21| BRDY
+--------------+


Z80SIO, Z80SIO0, Z8440, Z8470
Z80 dual async/sync serial I/O.
Z8470 (DART) has no synchronous capabilities.
+-----+--+-----+
D1 |1 +--+ 40| D0
D3 |2 39| D2
D5 |3 38| D4
D7 |4 37| D6
/INT |5 36| /IORQ
IEI |6 35| /CE
IEO |7 34| A0 B/A
/M1 |8 33| A1 C/D
VCC |9 32| /RD
/W_RDYA |10 Z8440 31| GND
/SYNCA |11 SIO-0 30| /W_RDYB
RxDA |12 29| /SYNCB
/RxCA |13 28| RxDB
/TxCA |14 27| /RxTxCB
TxDA |15 26| TxDB
/DTRA |16 25| /DTRB
/RTSA |17 24| /RTSB
/CTSA |18 23| /CTSB
/DCDA |19 22| /DCDB
CLK |20 21| /RST
+--------------+


MAX703
uP supervisor circuit with battery backup.
/RST remains low for 200ms after VCC exceeds 4.65V. On power failure VCCo is connected to VBAT, PFI and /MR are disabled, /RST and /PFO are low.
+---+--+---+
VCCo |1 +--+ 8| VBAT
VCC |2 MAX 7| /RST
GND |3 703 6| /MR
PFI |4 5| /PFO
+----------+


765
Floppy disk controller.
+-----+--+-----+
RST |1 +--+ 40| VCC
/RD |2 39| /RW SEEK
/WR |3 38| LCT DIR
/CE |4 37| FR STEP
D/S A0 |5 36| HDL
D0 |6 35| RDY
D1 |7 34| WP TS
D2 |8 33| FLT TR00
D3 |9 32| PS0
D4 |10 765 31| PS1
D5 |11 FDC 30| WDA
D6 |12 29| US0
D7 |13 28| US1
DRQ |14 27| HD
/DACK |15 26| MFM
TC |16 25| WE
IDX |17 24| VCO SYNC
INT |18 23| RDD
CLK |19 22| RDW
GND |20 21| WCLK
+--------------+


Z80SIO1, Z8441
Z80 dual async/sync serial I/O (bonding option #1).
+-----+--+-----+
D1 |1 +--+ 40| D0
D3 |2 39| D2
D5 |3 38| D4
D7 |4 37| D6
/INT |5 36| /IORQ
IEI |6 35| /CE
IEO |7 34| A0 B/A
/M1 |8 33| A1 C/D
VCC |9 32| /RD
/W_RDYA |10 Z8441 31| GND
/SYNCA |11 SIO-1 30| /W_RDYB
RxDA |12 29| /SYNCB
/RxCA |13 28| RxDB
/TxCA |14 27| /RxCB
TxDA |15 26| /TxCB
/DTRA |16 25| TxDB
/RTSA |17 24| /RTSB
/CTSA |18 23| /CTSB
/DCDA |19 22| /DCDB
CLK |20 21| /RST
+--------------+


Z80SIO2, Z8442
Z80 dual async/sync serial I/O (bonding option #2).
+-----+--+-----+
D1 |1 +--+ 40| D0
D3 |2 39| D2
D5 |3 38| D4
D7 |4 37| D6
/INT |5 36| /IORQ
IEI |6 35| /CE
IEO |7 34| A0 B/A
/M1 |8 33| A1 C/D
VCC |9 32| /RD
/W_RDYA |10 Z8442 31| GND
/SYNCA |11 SIO-2 30| /W_RDYB
RxDA |12 29| RxDB
/RxCA |13 28| /RxCB
/TxCA |14 27| /TxCB
TxDA |15 26| TxDB
/DTRA |16 25| /DTRB
/RTSA |17 24| /RTSB
/CTSA |18 23| /CTSB
/DCDA |19 22| /DCDB
CLK |20 21| /RST
+--------------+

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