选择最佳测试音和测试设备的成功高速ADC正弦波

fclose(fid);
v1=v1';
code=v1(:,2);
%Warning: ADC output may be clipping - reduce input amplitude
if (max(code)==2numbit-1) | (min(code)==0)
	disp('WARNING: ADC OUTPUT MAYBE CLIPPING - CHECK INPUT AMPLITUDE!');
end
figure;
plot([1:numpt],code);
title('TIME DOMAIN')
xlabel('SAMPLES');
ylabel('DIGITAL OUTPUT CODE');
Dout=code-(2^numbit-1)/2;				%Re-center the digitized sinusoidal input
Doutw=Dout;
Dout_spect=fft(Doutw);
Dout_dB=20×log10(abs(Dout_spect));
figure;
maxdB=max(Dout_dB(1:numpt/2));
plot([0:numpt/2-1].×fclk/numpt,Dout_dB(1:numpt/2)-maxdB);
grid on;
title('FFT PLOT');
xlabel('ANALOG INPUT FREQUENCY (MHz)');
ylabel('AMPLITUDE (dB)');
a1=axis; axis([a1(1) a1(2) -100 a1(4)]);
fin=find(Dout_dB(1:numpt/2)==maxdB);				%Find the signal bin (DC represents bin=1)
SPAN=max(round(numpt/200),5);				%Determine SPAN of input frequency on each side
SPANh=2;				%Search SPAN for harmonic distortion components on each side
spectP=(abs(Dout_spect)).× (abs(Dout_spect));				%Determine power level
Pdc=sum(spectP(1:SPAN));				%Determine DC offset power level
Ps=sum(spectP(fin-SPAN:fin+SPAN));				%Determine signal power level
Fh=[];				%Vector storing frequency and power components of signal and harmonics
Ph=[];				%HD1=signal, HD2=2nd harmonic, HD3=3rd harmonic, etc.
%Find the harmonic frequencies/power within the FFT plot
for har_num=1:10
	tone=rem((har_num × (fin-1)+1)/numpt,1);			%Note: tones > fSAMPLE are aliased back
	if tone>0.5
	tone=1-tone;
	end
	Fh=[Fh tone];
%For this method to work properly, make sure that the folded back high order harmonics do not overlap with DC and signal
%components or lower order harmonics.
	har_peak=max(spectP(round(tone×numpt)-SPANh:round(tone×numpt)+SPANh));
	har_bin=find(spectP(round(tone×numpt)-SPANh:round(tone×numpt)+SPANh)==har_peak);
	har_bin=har_bin+round(tone×numpt)-SPANh-1; Ph=[Ph sum(spectP(har_bin-1:har_bin+1))];
end
Pd=sum(Ph(2:5));				%Total distortion power level
Pn=sum(spectP(1:numpt/2))-Pdc-Ps-Pd;				%Extract noise power level
format;
A=(max(code)-min(code))/2numbit				%Analog input amplitude in mV
AdB=20×log10(A)				%Analog input amplitude in dB
SNR=10×log10(Ps/Pn)				%SNR in dB
SNR=10×log10(Ps/Pn)				%SINAD in dB
SINAD=10×log10(Ps/(Pn+Pd))
disp('THD - HD2 through HD5');
THD=10×log10(Pd/Ph(1))				%THD in dB
SFDR=10×log10(Ph(1)/max(Ph(2:10)))				%SFDR in dB
disp('SIGNAL AND HARMONIC POWER (dB)');
HD=10×log10(Ph(1:10)/Ph(1))
hold on;
plot(Fh(2)×fclk,0,'mo',Fh(3)×fclk,0,'cx',Fh(4)×fclk,0,'r+',Fh(5)×fclk,0,'g×',Fh(6)×fclk,0,'bs',Fh(7)×fclk,0,'bd',Fh(8)×fclk,0,'kv',
Fh(9)×fclk,0,'y^');
legend('SIGNAL','HD2','HD3','HD4','HD5','HD6','HD7','HD8','HD9');
hold off;

Conclusion

This application note provides one approach to establishing dynamic performance parameters of a high-speed ADC quickly and precisely. Digital data can also be analyzed using a high dynamic performance, high-resolution DAC in combination with an output filter and spectrum analyzer. However, that approach requires careful selection and design of the reconstruction signal path to avoid falsifying the ADCs true dynamic performance. Some applications may even prefer a test system with built-in digital distortion analyzer. Even a Logic Analyzer can deliver a quick, but rather inaccurate analysis of the digital output signals. Just remember: Choosing the appropriate configuration for your test setup entirely depends on the type of application, available hardware and software resources, design time, and the quality of dynamic performance results needed for your application.

References

1. Coherent Sampling vs. Window Sampling
   
2. Defining and Testing Dynamic Parameters in High-Speed ADCs, Part 1
   
3. Dynamic Testing of High-Speed ADCs, Part 2
   

Notes

1. If NRECORD is