关于自动布线，只布了一小部分，布的四层板，但是自动布线连过孔都没打，哪位帮我分析
时间：10-02
整理：3721RD
点击：
Mon Apr 18 16:23:26 2011
Autorouting C:\PADS Projects\default_blz.pcb
==============================================================================================
Pre-routing analysis
Warning:Not enough vias for routing from the top to the bottom of the design.
To correct the problem, define additional vias or enable vias for routing using
the Via Biasing tab of the Design Properties dialog box.
Warningins K1.1, K1.2, K2.2, K3.2, K4.2, K5.2, K6.2, K7.2, K8.2, K9.2, K10.1,
K10.2, K11.1, K11.2, K12.1, K12.2 are covered by board outline, trace(s) keepout(s), text(s) or copper(s).
To correct the problem, use Move commands in PADS Layout or PADS Router.
==============================================================================================
Passes Processed: Fanout, Route, Optimize
Routed Connections: 91(+91)
Vias: 0(+0)
Trace length: 49800(+49723) Mils
Test points: 0(+0)
Accessible nets: 0(+0)
Duration 00:00:39
==============================================================================================
Pass: 1 (Fanout)
Pins processed: 0
Fanouts created: 0
Routed Connections: 0(+0)
Vias: 0(+0)
Trace length: 77(+0) Mils
Duration 00:00:00(+00:00:00)
==============================================================================================
Pass: 3 (Route)
Routed Connections: 91(+91)
Vias: 0(+0)
Trace length: 49796(+49719) Mils
Duration 00:00:36(+00:00:35)
==============================================================================================
Pass: 4 (Optimize)
Vias: 0(+0)
Trace length: 49800(+4) Mils
Rerouted: 0
Duration 00:00:39(+00:00:03)
==============================================================================================
Autorouting C:\PADS Projects\default_blz.pcb
==============================================================================================
Pre-routing analysis
Warning:Not enough vias for routing from the top to the bottom of the design.
To correct the problem, define additional vias or enable vias for routing using
the Via Biasing tab of the Design Properties dialog box.
Warningins K1.1, K1.2, K2.2, K3.2, K4.2, K5.2, K6.2, K7.2, K8.2, K9.2, K10.1,
K10.2, K11.1, K11.2, K12.1, K12.2 are covered by board outline, trace(s) keepout(s), text(s) or copper(s).
To correct the problem, use Move commands in PADS Layout or PADS Router.
==============================================================================================
Passes Processed: Fanout, Route, Optimize
Routed Connections: 91(+91)
Vias: 0(+0)
Trace length: 49800(+49723) Mils
Test points: 0(+0)
Accessible nets: 0(+0)
Duration 00:00:39
==============================================================================================
Pass: 1 (Fanout)
Pins processed: 0
Fanouts created: 0
Routed Connections: 0(+0)
Vias: 0(+0)
Trace length: 77(+0) Mils
Duration 00:00:00(+00:00:00)
==============================================================================================
Pass: 3 (Route)
Routed Connections: 91(+91)
Vias: 0(+0)
Trace length: 49796(+49719) Mils
Duration 00:00:36(+00:00:35)
==============================================================================================
Pass: 4 (Optimize)
Vias: 0(+0)
Trace length: 49800(+4) Mils
Rerouted: 0
Duration 00:00:39(+00:00:03)
==============================================================================================