reliable value
时间：04-08
整理：3721RD
点击：
Hi
i design one CMOS LNA using FR CMOS tansistors and spiral inductors with help of HSPICE RF, but i dont know about reliable value of spiral inductors for implementing on chip? for example i want to know we have lower bound for spiral inductor values or no? can we implement 0.3 nH spiral inductor on chip with good relibility or no?
i design one CMOS LNA using FR CMOS tansistors and spiral inductors with help of HSPICE RF, but i dont know about reliable value of spiral inductors for implementing on chip? for example i want to know we have lower bound for spiral inductor values or no? can we implement 0.3 nH spiral inductor on chip with good relibility or no?
Yes you can implement 0.3nH inductor.
Keep in mind that it's rather critical to use an accurate inductor model especially, low value inductances as such (<0.5nH). I would suggest taking a look at the following site:
http://www.helic.com/VeloceRF
Spiral optimization is offered as well..;)
--padpan