iip3 improvement

Hi everyone,

i m working on differential amplifier and i need to improve the iip3 ! it is biased with a current mirror circuit and NMOS has been used for the design.
i m pretty sure that by having a good DC bias you can improve your iip3 however what i want to know is that is there any relation between width/ lenght of the NMOS and improvement of IIP3?

plz explain it clearly cuz i m rookie!:D

Added after 5 hours 44 minutes:

please someone answer my question!