PLL noise modelling with non conventional architecture
I have a non traditional PLL block with attenuator and mixers in between the closed loop. Could someone confirm the followin when modelling PLL Noise (Total Phase Noise Contribution) :
- If in case I have an attenuator (or passive double balanced mixer) in between the blocks, how its invidivual phase noise is seem as a contribution since it is a passive device ? Still, Should I consider the phase noise as f^0 (white phase) or just a thermal noise (k0) ?
- How can I model it in terms of numerical k term ? I mean thermal noise which shows zero dB/Dec slope region.
- What about the own insertion loss that in fact provides desensibilization (noise) but appers to not disturb SSB phase noise ?
Thank you in case someone can drop some ideas.
An attenuator, unless it has broken resistor elements (like microcracking), will have flat KTB noise. Since thermal noise is half AM and half PM, the phase noise portion is 3 dB less.
A mixer is NOT a resistive attenuator though. If you are modelling a mixer, you have to take into account the 1/f noise of the schottky diodes.
Hi Bif,
Thanks for the nice explanation.
If I understoood you correctly I have to use k0 = 4KTBR for the resistive attenuator.
Now for the mixer, I guess I will need additive contribion of Ko (do not know yet how to associate the R factor with its conversion loss) and K1, being the K1 = flicker phase = 1/f (this I could look into the schootky diode SPICE model in order to raise correct numbers).
Regards,
Enrico.