Strange results on voltage doubler (charge pump) design using native transistors.

Hi folks. I am designing a voltage doubler in a TSMC process. I used diode-connected native transistors (VTH is a few ten mV) and the schematic is shown in the enclosed pic.

When I did transient simulation, I found something weird and different to what I read. At the moment when the transistors were turned on/off, I saw some current spikes, see the fig.

I can reduce the amplitude of the spikes by
1) decrease the size of the transistors
2) Reduce the input signal frequency

This gives me the feeling the spikes are due to some capacitive divider, does anyone have any clue on this?

Thanks.

It is true those spikes do not happen with a normal diode-and-capacitor voltage doubler.

Looking at your scope images... your AC supply does not appear to be symmetrical above and below 0V.

However maybe it's okay, because it appears you are not switching the mosfets at a 50 percent duty cycle. Instead they are switched approximately when the supply crosses 0V.

To eliminate the spikes, I believe you have to determine the exact times when the supply crosses zero. Then you would switch the mosfets at exactly those moments.

It will be tricky to achieve, whether you experiment, or use a mathematical formula.