For wich terminal Rl=Rin/3 in common source FET oscillator?

For gate or for drain? In common-source FET oscillator i think that Gs is at gate, and Gl at drain. Is that right?
In some sources: Gs (source network) Gl (load network)
In other Gl (load network) Gt (terminating netwok)
I am confused.

Maybe this start-up oscillation rule can be used on any of two ports?