parasitic capacitances and inductances in CMOS small signal model

I want to ask a question about small signal model for power amplifier using CMOS. I need to design one at about 2GHz, do I need to care about parasitic capacitances, inductances such as Cgs, Cgd, Lg,...

First, you should use nonlinear large signal model instead of small signal model.If you use simplified small signal model, you would make a big mistake..
Second,those capacitances are not constant, inversely they are bias dependent and all you should is to simulate under preferred bias conditions.Cadence is the right tool for that and it will give you model elements under that bias condition.