Reference Clock for DDS

can we use CMOS reference clock( instead of sinosoidal ) for DDS (e.g AD9915) in PLL enabled mode.

they expect a digital signal for this type of chip. Both of the differential ref clock inputs need to be DC blocked with a series capacitor. You can hook a CMOS output to one of the ref clock inputs thru a series cap. The other ref clock input goes thru a capacitor to ground. You may have better luck using a balun to make a differential output from a single ended cmos input.

You either need to run the cmos off of a 1.5 volt source, or use an attenuator pad to lower the peak-peak voltage at the input pin to be 1.5 v max single ended, or 1.5 v map differential if you use a balun