SiGe MMIC design using Cadence!

Hello, there are two problems.
1. I have seen that someone design a SiGe MMIC circuit, like LNA, divider, or even an receiver at 60GHz in cadence, but we could not do EM simulation in cadence as the lines in the circuit must be considered to be transmission line in such high freq. my question is that how do we deal with the lines and the EM coupling between components so that we can obtain the expected results?

2. In the MMIC design in SiGe BiCMOS or just CMOS RFIC, how do we consider the interstage matching, for example, the input of LNA is 50 Ohm, how can I consider to be the output of LNA as the next stage of LNA is the mixer, but the mixer have not been design yet? That is to say, I am confused about the circuit blocks connection in RFIC or MMIC system, can anyone explain in detail?


Are there any books or papers recommended about these problems?

thank you all!
Wish you good luck!

pursue

1-Some EM simulators ( Sonnet, ADS,MWOffice) can supply "socket" for Cadence ADE to able to simulate the layouts.All you need to install a proper simulator which can work under Cadence Design Environment.After extraction of active parts, you can use these simulators to get Passive Microwave Response of the layout.
2-For RFIC circuits, interstage matching is not considered in every time if the distance between the block is very short.However interstage matching networks can be tough when the distance is long regarding to wavelength.For your case, If the mixer is not designed yet, you can estimate an impedance for that then you can move forward.Or, you can check the performance of your LNA in different termination conditions.