Subthreshold CMOS design

I am currently designing a ring VCO in CMOS subthresold region of operation. The output level of the VCO varies from 0.5 V to 1 V (V_DD) with frequency of 50 MHz. Since all the MOS are in subthreshold region, their output resistance is in the range of MegaOhms. So my VCO output resistance is also in MegaOhms.

Can you help me design a circuit that will do the following:
1. Bring down the VCO output level to 0 V
2. Create an output buffer in Subthreshold region of operation with output resistance of 50 Ω

NOTE: Current-starved Subthreshold design will be very much preferred