Effect of flip-chip bump inductance on the amplifier.
时间：04-04
整理：3721RD
点击：
Hi,
I'm trying to see the effect of the package on a multi-stage single-ended 28 GHz amplifier. I have designed my amplifier in Cadence Virtouso and have SnP file from my momentum simulation. All the ports in my momentum simulation are referenced to the ideal ground which is at the back of the chip.
Now I want to see the effect of package on the gain and stability of my amplifier.
the chip is going to be bonded on PCB by a 80 um bumps. I'm simulating my PCB input and output which are grounded CPW in HFSS and my reference plane in HFSS is the bottom ground.
Now the problem is that the reference of EM simulation from momentum is different from the PCB ground. So how can I use these two EM simulatiosn in ADS to see the effect of package and bump inductance?
Any help is highly appreciated.
Thanks.
I'm trying to see the effect of the package on a multi-stage single-ended 28 GHz amplifier. I have designed my amplifier in Cadence Virtouso and have SnP file from my momentum simulation. All the ports in my momentum simulation are referenced to the ideal ground which is at the back of the chip.
Now I want to see the effect of package on the gain and stability of my amplifier.
the chip is going to be bonded on PCB by a 80 um bumps. I'm simulating my PCB input and output which are grounded CPW in HFSS and my reference plane in HFSS is the bottom ground.
Now the problem is that the reference of EM simulation from momentum is different from the PCB ground. So how can I use these two EM simulatiosn in ADS to see the effect of package and bump inductance?
Any help is highly appreciated.
Thanks.