Calculations for decoupling capacitor

If we want to filter power lines, one rough esimate is to place decoupling caps of value 0.001uF at the input pin of the device between power and ground to reduce transients. Device manufacturer suggests to place of couple of D-caps in parallel and values too. Is there any way to find out the exact values of D-caps to reduce transients on line.

One general rough estimate is to present a low impedance over a wide band.

Thats the reason for Power supply we generally use a pair of Small and large Decaps.

If ur operating voltage is for RF or Microwave freq, then we need to also add a very small decap valu eof 12pF or 15pF.

Take a look at this appnote from xilinx for decoupling FPGA's, this gives an idea about decoupling.

http://www.xilinx.com/support/docume...es/xapp623.pdf

For a much broader view

http://www.ansoft.com/deliveringperf...ation_Labs.pdf