微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 微波和射频技术 > 电磁仿真讨论 > Extraction of Capacitance of a Interdigitated Capacitor in HFSS

Extraction of Capacitance of a Interdigitated Capacitor in HFSS

时间:03-25 整理:3721RD 点击:
Hello,

I have been trying to characterise some IDCs using HFSS, but I haven't got any luck confirming my results, in a way that I don't understand which is the correct way to extract the capacitance.

What I have been doing is to draw a layout mentioned on a paper with the dimension and circuit expression as follow, and they calculated the series capacitance:



In my simulation, it connected by very short transmission line to two wave ports, and I used de-embed to shift the plane to the starting point of the IDC.
I tried to use Driven Modal, implementing it on CPW (as the paper did) with micro meter dimension over 4-16GHz.

The way I used to extract the capacitance is to approximate it using a pi-network as shown above, then I looked at the Y-parameter as given on Wikipedia:
http://en.wikipedia.org/wiki/Admitta...rt_network.svg

What really confused me is:
1. In order to calculate the Series Capacitance, assuming ideal case, can I take the impedance as "-Y(1,2)", and then extract it as C_series=im(-Y(1,2))/(2*pi*freq)?

2. Many people on the web actually suggested that the Capacitance should be im(Y(1,1))/(2*pi*freq), but then I don't understand how we actually get this expression.

Any help would be much appreciated.

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top