[moved] Delay calculation of 2 input NAND gate by using hspice
时间：03-25
整理：3721RD
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I have written code in following format. While simulating my code it was not showing any errors. But in my .lis file it showing tpHLnand and tpHLnand values are failed. and delay is also failed. what does it mean??. Can you please help me. Iam new to hspice. Thanks..
Code:
.tran 0.1p 100u .probe v(V1) v(nandout1) .meas tran tpHLnand trig V(V1)='0.5*supply' rise=1 +targ v(nandout1)='0.5*supply' fall=1 .meas tran tpLHnand trig V(V1)='0.5*supply' fall=1 +targ v(nandout1)='0.5*supply' rise=1 .meas tpdnand_noload param='(tpHLnand+tpLHnand)/2'