微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 微波和射频技术 > 电磁仿真讨论 > Question about defining discrete ports in CST

Question about defining discrete ports in CST

时间:03-24 整理:3721RD 点击:
Hello everyone,

I am new to CST and am trying a simple structure with P/G plane and a signal line on the top layer. I defined discrete ports (in the z direction and z = the thickness of the package) at each ends of the signal line. and when I try to simulate it says discrete port in a PEC, hence terminated. Could someone help me with this. I used a background material of PEC.
Can I use waveguide ports for this kind of structure?

Thanks
Ashwini

you should change the background material from PEC to normal.
this will solve the problem

regards

Thank you. I will do that..

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top