想请教一下VCO的噪声特性

同不解，你能把原文放出来么?
求教高人

从第二张图上可以看到VCO的噪声特性几乎像是低通的

这个不能一概而论，对于整个PLL loop来说，vco的噪声确实是高通，但是inband noise还是有，看你的loop filter能够虑掉多少inband noise。
你贴的那个图，可以明显看到在低频的时候是reference noise dominate， 然后在靠近bandwidth 的地方vco noise有贡献更大。

我不明白的是为何ON CHIP VCO 与传统意义上的VCO有这样的区别，另外我也看过别的资料，有的ON CHIP VCO 带内噪声很小，几乎和Sigma
delta Modulator 相似，而本图上黑色（VCO）与蓝色（SDM）虚线在频率funity下差别很大

W. Rhee的phase noise分析中未考虑Charge pump的噪声。in-band噪声通常是CP噪声贡献。
请看附件中的相位噪声分析。

LS大哥，你的意思是说Rhee的分析中将CP的噪声算在VCO中，所以VCO在带内也表现了很大的噪声?

Pls look at the two fig. acutally, they are quite similar. The first one only shows up to fz(euqivalent to about 20Khz in the second fig. And that is why VCO PN still "flat"). While the second one tells us much more inband information(You can also see VCO PN also "flat" around 20K~100K. CP PN still small in this range).LS does not means his VCO PN accounts CP PN.In the first figure, if you plot more lower frequency band, you will see VCO will never dorminate definitely.

And judging from Wz<Wugb<Wp, actually, you can aso find that VCO noise around Wz~Wugb range still play critical important. That is why RW said VCO PN also impact on inband. However, usually(wugb-wz)/wugb is small, therefore VCO PN should not dorminate in many cases.

如果CP噪声贡献很小时，in-band就有VCO的噪声贡献。但是，in-band噪声不是平坦的。
附件是另一种情形，CP噪声贡献相对较小。
注：100Hz以内往往是参考时钟的噪声贡献，如果其性能不好的话，in-band也会有贡献。

你的意思是否是 “当CP噪声贡献很小时，带内的VCO噪声影响不可被忽视”

如上述附图，如果环路带宽增大为120kHz，带内噪声就是CP的贡献，VCO贡献就只在带外了。
合理的PLL应该是，100Hz以内为参考时钟贡献；100Hz到环路带宽(in-band范围)通常比较平坦，为CP贡献；环路带宽之外为VCO贡献。
环路带宽的最优点为CP噪声贡献与VCO噪声贡献相等。

first, VCO's phase noiseis 30dB/dec within corner frequency and then 20dB/dec. The transferfunction for VCO phase noise in pll is -40dB/dec within zero and then -20dB between zero and ubw, and then 0 higher than ubw. so, only between zero and ubw, vco phase noise contribution is flat.
then, the loop parameters in PLL is mainly for attenuating inband VCO phase noise, you never want inband VCO phase noise dominates. From this point of view, the bandwith should be the higher the better, both for attenuating VCO phase noise and fast settling. However, the constrains are 1, stability 2, spur 3, quantiztion noise 4, When the bandwith is wide enough that VCO noise contribution is as small as the lowpass noise sources contribution at ubw frequecy point, if you go on widening the bandwidth, it will not help improving overall phase noise.
finally, all the designs depand on your psec.

thanks a lot for all

eetopeetopeetop

:victory: :victory:

牛人，理解很深入啊

学习了

謝謝分享， 增廣見聞了

thank you for sharing

It depends on the loop bandwith and the VCO phase noise characteristics

会不会是环路带宽设置的问题啊?

好贴，学习了

thanks

thanks

thanks