求高人指导！如何用Verilog-A实现下降沿触发

@(cross (V(a)-Vmid, -1)) begin .
// Vmid is the middle voltage. if rail to rail is 0~1.2V, Vmid=0.6V
// but you could set any value you want.
end

这是我的代码，仿真结果不对啊