求助贴,关于运放结构实现的比较器功能
参考国外的毕业论文设计,一个采用如图结构的电路,用于比较两个输入端电压的值,参考的文章比较的延时可以达到200ps,但是我仿出来数量级都差了好多,大概在几十个纳秒。开关电容结构的比较器由于采用了正反馈结构可以达到几百个ps,这种结构可能吗?如果不行的话,应该采用怎么样的结构,才能实现?求大神帮忙啊
What is the application of your comparator ?
Which kind of technology do you use ?
Have you ever calculate the bandwidth of your comparator ?
Is your application allowed to use dynamic comparator ?
Have you considered preamp+latch structure ?
可以看看martin的模电,专门有一章讲比较器
Thank you for the questions.The comparator is used to detect the two inputs' zero crossing point,which means the two inputs change their conditions that one is bigger than the other one to the opposite.The design is under 180nm technology ,which is longer than the original design.
The bandwidth is about 200M,with a load of 1pF capacitor.
In my application ,clock-controlled comparators can't be used ,which means dynamic comparator is not suitable.
You mentioned that pream+latch may be a good idea ,but does it work without a preset?
Thank you
Thank you
200MHz带宽,时延有几十个ns?
你AC仿出来确定是200MHz?GBW?
GBW
你M5/M6的size?
还有差分运放的bias current?
M5 is sized to be 20x larger compared to M6 in order to minimize the delay
of the ZCD. The transconductance of M5 is much larger compared to that of M6
感觉和有可能是你的M5/M6的输入电容太大
然后第一级的bias current太小导致的slew问题
You just tell me the working principle of a comparator, not application.
Application means where you will use your comparator. Maybe it's not convenient to tell me.
So what's your application's requirement ?
high speed ? high resolution ? or both ? .......
The speed of a static comparator normally limited by linear response and slew-rate.
Your ciruit maybe limited by slew-rate.
But don't forget that the speed of linear response of a comparator is limited by -3dB freq, not GBW.
GBW just shows the tradeoff.
If you have specific speed requirement, you have a specific -3dB freq requirement.
Thank you for your patient guidance。
Mark。
感觉这种结构的延迟就是纳秒级的吧,除非电流取到很大
现在我得出的也就是几个ns,看MIT的论文,他们做出的结果和普通的锁存比较器结果差不多,能达到200个ps。
把电流加大呗,想要多快都可以,要不就用小尺寸器件,或者用低阈值滴管子
多谢
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