请问有谁用过TSMC 。18的工艺，问几个寄生的问题

CONTACT的电容?从没有考虑过

11欧姆的样子

画一个提取一下不就知道了嘛

If you are asking the CAPACITANCE of the contact, not the resitance, you must mean the contact to poly gate coupling capacitance, it should be small as the spacing is rather large in 0.18u, you could omit in your simulation, and generally foundry won't consider this in the RC extraction.
For metal capacitance, it is usually assumed cap per unit length by assuming miminum metal width. The value is dependent on the local environment such as spacing, swticng signal..., but for typical values you can use 0.2~0.3fF/um for minimum pitch and grounded lines up/below/around. This value decreases slowly as process shrinks.

1# foxest1
每平方UM的METAL1的电容大概是多大?
这个应该要和第几层之间或衬底之间的电容有多大吧。
下面是MOSIS上公布的数据，可作参考。
链接：http://www.mosis.com/cgi-bin/cgi ... _thk_mtl-params.txt
CAPACITANCE PARAMETERSN+P+POLY M1 M2 M3 M4 M5 M6 R_WD_N_WM5P N_WUNITS
Area (substrate)969 123410134 149754129130 aF/um^2
Area (N+active)851753 20 14 1198aF/um^2
Area (P+active)8275aF/um^2
Area (poly)64 17 10754aF/um^2
Area (metal1)35 14965aF/um^2
Area (metal2)36 1496aF/um^2
Area (metal3)37 149aF/um^2
Area (metal4)36 14aF/um^2
Area (metal5)351039aF/um^2

不错啊！