UVM register model仿真报错
时间：10-02
整理：3721RD
点击：
使用的是VCS，编译没有问题在仿真时出现如下错误，“W1C”感觉不应该报unknown access right. 有没有大神帮忙解释一下。非常感谢！
错误提示如下所示：
UVM_INFO @ 0: reporter [RNTST] Running test case0...
UVM_ERROR /eda/synopsys/uvm-1.1d/src/reg/uvm_reg_field.svh(953) @ 0: reporter [RegModel] Register 'rm.status_1' containing field 'overrun_err' is mapped in map 'rm.default_map' with unknown access right 'W1C'
UVM_FATAL @ 0: reporter [BUILDERR] stopping due to build errors
错误提示如下所示：
UVM_INFO @ 0: reporter [RNTST] Running test case0...
UVM_ERROR /eda/synopsys/uvm-1.1d/src/reg/uvm_reg_field.svh(953) @ 0: reporter [RegModel] Register 'rm.status_1' containing field 'overrun_err' is mapped in map 'rm.default_map' with unknown access right 'W1C'
UVM_FATAL @ 0: reporter [BUILDERR] stopping due to build errors
走过路过不要错过，大家一起来讨论讨论！
坐等大神来解答！