我从未遇到过的错误！知道的麻烦说一声。谢谢了！
时间：10-02
整理：3721RD
点击：
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity con_led is
port(
clk:in std_logic;
clk_rom:buffer std_logic;
addr:buffer std_logic_vector(15 downto 0);
scanut std_logic_vector(15 downto 0)
);
end con_led;
architecture abc of con_led is
signal clk_mn:std_logic;
begin
fenpin:process(clk)
variable counter_mn:integer range 0 to 15;
begin
if(rising_edge(clk))then
if(counter_mn=15)then
counter_mn:=0;
clk_mn<=not clk_mn;
elsif (counter_mn=5)then
clk_rom<=not clk_rom;
counter_mn:=counter_mn+1;
else counter_mn:=counter_mn+1;
end if;
end if;
end process fenpin;
adder_mn:process(clk_mn)
variable counter_n:integer range 0 to 5*16*2;
variable counter_m:integer range 0 to 15;
begin
if(rising_edge(clk_mn))then
if(counter_n=160)then
counter_n:=0;
else
counter_n:=counter_n+1;
addr<=addr+1;
end if;
if(counter_m=15)then
counter_m:=0;
else
counter_m:=counter_m+1;
case counter_m is
when 0=> scan<="0000000000000001";
when 1=> scan<="0000000000000010";
when 2=> scan<="0000000000000100";
when 3=> scan<="0000000000001000";
when 4=> scan<="0000000000010000";
when 5=> scan<="0000000000100000";
when 6=> scan<="0000000001000000";
when 7=> scan<="0000000010000000";
when 8=> scan<="0000000100000000";
when 9=> scan<="0000001000000000";
when 10=> scan<="0000010000000000";
when 11=> scan<="0000100000000000";
when 12=> scan<="0001000000000000";
when 13=> scan<="0010000000000000";
when 14=> scan<="0100000000000000";
when 15=> scan<="1000000000000000";
when others => scan<="0000000000000000";
end case;
end if;
end if;
end process adder_mn;
end abc;
============================================================================================
提示如下错误：
Error: Cannot route source node "scan[15]~reg0" of type logic cell to destination node "scan[15]" of type I/O pin
Error: Cannot route source node "scan[8]~reg0" of type logic cell to destination node "scan[8]" of type I/O pin
Error: Can't find fit
Error: Quartus II Fitter was unsuccessful. 3 errors, 0 warnings
Info: Allocated 153 megabytes of memory during processing
Error: Processing ended: Tue Apr 15 13:04:07 2008
Error: Elapsed time: 00:00:15
Error: Quartus II Full Compilation was unsuccessful. 3 errors, 0 warnings
双击错误提示过后，弹出如下的一个图像。啊~！这是什么啊，我看不懂啊···
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity con_led is
port(
clk:in std_logic;
clk_rom:buffer std_logic;
addr:buffer std_logic_vector(15 downto 0);
scanut std_logic_vector(15 downto 0)
);
end con_led;
architecture abc of con_led is
signal clk_mn:std_logic;
begin
fenpin:process(clk)
variable counter_mn:integer range 0 to 15;
begin
if(rising_edge(clk))then
if(counter_mn=15)then
counter_mn:=0;
clk_mn<=not clk_mn;
elsif (counter_mn=5)then
clk_rom<=not clk_rom;
counter_mn:=counter_mn+1;
else counter_mn:=counter_mn+1;
end if;
end if;
end process fenpin;
adder_mn:process(clk_mn)
variable counter_n:integer range 0 to 5*16*2;
variable counter_m:integer range 0 to 15;
begin
if(rising_edge(clk_mn))then
if(counter_n=160)then
counter_n:=0;
else
counter_n:=counter_n+1;
addr<=addr+1;
end if;
if(counter_m=15)then
counter_m:=0;
else
counter_m:=counter_m+1;
case counter_m is
when 0=> scan<="0000000000000001";
when 1=> scan<="0000000000000010";
when 2=> scan<="0000000000000100";
when 3=> scan<="0000000000001000";
when 4=> scan<="0000000000010000";
when 5=> scan<="0000000000100000";
when 6=> scan<="0000000001000000";
when 7=> scan<="0000000010000000";
when 8=> scan<="0000000100000000";
when 9=> scan<="0000001000000000";
when 10=> scan<="0000010000000000";
when 11=> scan<="0000100000000000";
when 12=> scan<="0001000000000000";
when 13=> scan<="0010000000000000";
when 14=> scan<="0100000000000000";
when 15=> scan<="1000000000000000";
when others => scan<="0000000000000000";
end case;
end if;
end if;
end process adder_mn;
end abc;
============================================================================================
提示如下错误：
Error: Cannot route source node "scan[15]~reg0" of type logic cell to destination node "scan[15]" of type I/O pin
Error: Cannot route source node "scan[8]~reg0" of type logic cell to destination node "scan[8]" of type I/O pin
Error: Can't find fit
Error: Quartus II Fitter was unsuccessful. 3 errors, 0 warnings
Info: Allocated 153 megabytes of memory during processing
Error: Processing ended: Tue Apr 15 13:04:07 2008
Error: Elapsed time: 00:00:15
Error: Quartus II Full Compilation was unsuccessful. 3 errors, 0 warnings
双击错误提示过后，弹出如下的一个图像。啊~！这是什么啊，我看不懂啊···
资源?程序库?
没碰到过，猜一下了。
1、是不是程序库少一个?（STD_LOGIC_ARITH.ALL)?
2、综合的时候资源不够了?。你的型号片子在布线的时候区域单位内的资源不能满足要求，吧SPEED改成平衡模式试验下哦。
还没碰到过，等大牛来吧
谢谢你 ··你的第一个方法我已经试了不行···第二个方法呢··我是新手暂时还不懂你的意思···所以请详细说明谢谢
我现在换了一块芯片过后··可以综合了··但是我差了一下资源使用情况··我只使用了一小部分资源啊··怎么会出现这种情况?
在芯片的综合设置里，有三个选择。SPEED，BALANCED，AREA，SPEED是把芯片的综合结果尽可能的追求高速度。会在区域内集合很多的资源有的时候会让芯片的资源超标。改成BALANCED就会降低一部分工资速度换来更多的布线空间来解决资源的问题。
学习了··谢谢！
帮你顶一下