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这个程序编译有个警告!大家来帮一下!谢谢

时间:10-02 整理:3721RD 点击:
这个是8位移位运算器程序,在Quartus 11下运行,编译时有个警告,我不会改,请大家来帮我,谢谢各位了!

......................耍人玩呢?:)

是这个程序!
Library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
ENTITY SHIFTER IS
PORT(CLK,M,C0:IN STD_LOGIC;
S : INSTD_LOGIC_VECTOR(1 DOWNTO 0);
D : INSTD_LOGIC_VECTOR(7 DOWNTO 0);
QB: OUTSTD_LOGIC_VECTOR(7 DOWNTO 0);
CN: OUTSTD_LOGIC);
END ENTITY;
ARCHITECTURE BEHAV OF SHIFTER IS
SIGNAL ABC : STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL REG : STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNALCY : STD_LOGIC;
BEGIN
PROCESS(CLK,ABC,C0)
BEGIN
IF CLK'EVENT AND CLK = '1' THEN
CASE ABC IS
WHEN "011" =>REG(0)<= C0; REG(7 DOWNTO 1)<= REG (6 DOWNTO 0);
CY <=REG(7);
WHEN "010" =>REG(0)<=REG(7); REG(7 DOWNTO 1)<=REG(6 DOWNTO 0);
WHEN "100" =>REG(7)<=REG(0); REG(6 DOWNTO 0)<=REG(7 DOWNTO 1);
WHEN "101" =>REG(7)<= C0 ; REG(6 DOWNTO 0) <= REG(7 DOWNTO 1);
CY <= REG(0);
WHEN "110" =>REG(7 DOWNTO 0) <= D(7 DOWNTO 0);
WHEN "111" =>REG(7 DOWNTO 0) <= D(7 DOWNTO 0);
WHEN OTHERS => REG <= REG ; CY <= CY;
END CASE;
END IF;
END PROCESS;
ABC <= S & M; QB(7 DOWNTO 0)<= REG(7 DOWNTO 0);CN<=CY;
END BEHAV;

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