cc1310的wor历程可以在加了PA的电路板上运行吗？

cc1310的wor历程可以在加了PA的电路板上运行吗？因为pa有两个脚去控制发送接收和休眠，那么这个怎么去使用呢？

CC1310控制PA，可以参考TRM的23.3.2.8 External Signaling部分

The radio CPU controls the signals CPEGPO0 and CPEGPO1. For control of an external front end, CPEGPO0 is high when the LNA must be enabled; otherwise, CPEGPO0 is low. CPEGPO1 is high when the PA must be enabled; otherwise, CPEGPO1 is low.

另外，还可以参考下面这个文档

http://processors.wiki.ti.com/index.php/CC26xx_Range_Extender_Control

你好，这个原理我知道了，但是具体怎么操作呢？

The default configuration of RF Core Data Out 0 is to be high when the LNA is enabled and similarly RF Core Data Out 1 is configured to be high when the PA is active. These RF Core Data outputs can be directly assigned to DIOs through the IO Control registers IOCFGx (x = DIO number) bits 5-0. See the technical reference manual chapter 11.3.2.1 details.

Let's say the PA_enable signal is on DIO7, the LNA_enable signal is on DIO13 and HGM is on DIO14. We thus need to connect RF Core Data Out 0 to DIO13 and RF Core Data Out 1 to DIO7.

Thus the following registers must be set using the CC26xxware driverLib:

• IOCFG7 = 0x30
• IOCFG13 = 0x2F

which can be done through the IOCPortConfigureSet function:

    #include <driverlib/ioc.h>
    // Map RFC_GPO0 to DIO13
    IOCPortConfigureSet(IOID_13, IOC_PORT_RFC_GPO0,
                    IOC_IOMODE_NORMAL);
    // Map RFC_GPO1 to DIO7
    IOCPortConfigureSet(IOID_7, IOC_PORT_RFC_GPO1,
                    IOC_IOMODE_NORMAL);

将CC1310芯片的PA和LNA输出到指定的GPIO引脚上，这些GPIO引脚分别连到PA芯片的PA和LNA上即可。

在发送数据需要使能PA时，该引脚会自动拉高，同理，接收数据时，LNA引脚会自动拉高。