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CC1310 资料相关问题

时间:12-23 整理:3721RD 点击:

1,有关 时钟树,哪里有完整的简图,比方手册swcu117g.pdf   P1190 GPT 原理框图中的PERDMACLK,来自哪里?

在Power reset and clock management 里 有关CLOCK部分 并没有找到PERDMACLK是什么?!

2,PRCM Registers 我觉得排版上是没有点问题? AON_SYSCTL /  AON_WUC  / PRCM 从排版上看,好像是CC26XX独有的,然而 CC13X0也有;

1、这个开发工程师解释过,原答案照搬:

SCLK_HF is the source for all these bus clocks. An overview of the clock system is shown in Figure 6-6 in the TRM.

When the system bus in the device is shut off (Standby + Idle when RF is not used) it is possible to use divided clocks for the PERBUSULL and PERBUSDMACLK (two different internal buses where various modules are connected).

Since supporting that functionality would require quite complicated peripheral drivers we have hidden those registers and removed support for it.

TLDR: PERDMACLK is the same as SCLK_HF (48MHz)

2、第二个问题没看明白,swcu117g的排版上是把CC13XX跟CC26XX分开,更清楚些

又是HIDDEN...

Figure 13-4 shows how to generate an output PWM with a 1-ms period and a 66% duty cycle assuming a
50-MHz input clock and TnPWML = 0 (duty cycle would be 33% for the TnPWML = 1 configuration). For
this example, the start value is GPT:TnILR = 0xC350 and the match value is GPT:TnMATCHR = 0x411A.

这个50MHz 不会随便举个例子吧? 最大也就48MHz啊; “手上几片IC莫名其妙坏了,没法试验一下”。

见附件菜单分级目录看,我还以为AON_SYSCTL是CC26X0独有的呢,因为它在CC26X0 PRCM 子菜单下。

:) 这个项目开发我都花去很花去很长时间了,进展很缓慢。。。对芯片一知半解。。。

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