求解CC1101接收一次错误后再也不能接收正确

在用CC1101做通信测试，主机每10秒钟发送一次数据，从机接收数据后解码点灯。

问题如下：

1、从机在接收数据不出错的时候，接收正常，接收信号灯和解码后的数据正确的LED也能正确点亮，但是若其中一次接收信号解码错误后，后面一直就是解码错误但是数据是有接收的。

2、出错的时间不定，快的10来分钟就出现，慢的能跑2天多

求解为什么出错一次，后面的接收一直都出错？

主控室MSP430G2332

代码如下：

主程序

while(1)
   {
    
     mydelay_rf(11);                               
     if(rxflag==1)
         {
           WDTCTL = WDTPW + WDTHOLD;                 
           P2OUT |=BIT2;     //有信号进来点亮LED1
           rxflag = 0;
           
           TI_CC_GDO0_PxIE &= ~TI_CC_GDO0_PIN; 
           
           gpovertime = 1500;
           clearrxbuf();    //清接收数组缓存
           while(gpovertime--)
           {
               if(RFReceivePacket(rxBuffer,&len))
               {
                 recode = fun_compare_v20();
                 if(recode ==0x00)
                 {
                   P1OUT |=BIT1;   //接收信号正确点亮LED2
                    break;
                 }
               }            
               mydelay(20);
           }
           TI_CC_GDO0_PxIE &= ~TI_CC_GDO0_PIN;
           P1OUT &=~BIT1;
           P2OUT &=~BIT2;
           rxflag = 0;  
         } 
    P1OUT |=BIT3;
    P1OUT |=BIT2;
    P2OUT &=~(BIT1+BIT0);   //--GDO GD2输出为0
          
    fun_powerdowncc1101();  //--启动CC1100睡眠 
    YKdelay = 3;
    fun_watchdogdelay(YKdelay);//--3s唤醒
    BCSCTL2 |=divS_2;
    fun_cc11xx_TXtoRX();       //--启动接收程序  
   }

CC1101配置

 TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG0,   0x06);  // GDO0 output pin config.    
    TI_CC_SPIWriteReg(TI_CCxxx0_PKTLEN,   0x3D);  // Packet length.
    TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL1, 0x04);  // Packet automation control.
    TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL0, 0x05);  // Packet automation control.    
    TI_CC_SPIWriteReg(TI_CCxxx0_ADDR,     0x00);  // Device address.
    TI_CC_SPIWriteReg(TI_CCxxx0_CHANNR,   0x00); // Channel number.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL1,  0x0B); // Freq synthesizer control.    
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL0,  0x00); // Freq synthesizer control.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREQ2,    0x5D); // Freq control word, high byte
    TI_CC_SPIWriteReg(TI_CCxxx0_FREQ1,    0x93); // Freq control word, mid byte.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREQ0,    0xB1); // Freq control word, low byte.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG4,  0x78); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG3,  0x93); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG2,  0x83); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG1,  0x22); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG0,  0xF8); // Modem configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_DEVIATN,  0x44); // Modem dev (when FSK mod en)
    TI_CC_SPIWriteReg(TI_CCxxx0_MCSM1 ,   0x30); //MainRadio Cntrl State Machine
    TI_CC_SPIWriteReg(TI_CCxxx0_MCSM0 ,   0x18); //MainRadio Cntrl State Machine
    TI_CC_SPIWriteReg(TI_CCxxx0_FOCCFG,   0x16); // Freq Offset Compens. Config
    TI_CC_SPIWriteReg(TI_CCxxx0_BSCFG,    0x6C); //  Bit synchronization config.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL2, 0x43); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL1, 0x40); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL0, 0x91); // AGC control.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREND1,   0x56); // Front end RX configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_FREND0,   0x10); // Front end RX configuration.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL3,   0xA9); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL2,   0x0A); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL1,   0x00); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL0,   0x11); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_FSTEST,   0x59); // Frequency synthesizer cal.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST2,    0x88); // Various test settings.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST1,    0x31); // Various test settings.
    TI_CC_SPIWriteReg(TI_CCxxx0_TEST0,    0x0B);  // Various test settings.

数据发送程序

void RFSendPacket(unsigned char *txBuffer,unsigned char size)
{
TI_CC_SPIStrobe(TI_CCxxx0_SFTX); // Change state to TX, initiating
TI_CC_SPIWriteBurstReg(TI_CCxxx0_TXFIFO, txBuffer, size); // Write TX data
TI_CC_SPIStrobe(TI_CCxxx0_STX); // Change state to TX, initiating
// data transfer

while (!(TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN));
// Wait GDO0 to go hi -> sync TX'ed//
while (TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN);
// Wait GDO0 to clear -> end of pkt//
}

数据接收程序

unsigned char RFReceivePacket(unsigned char *rxBuffer, unsigned char *length)
{
unsigned char status[2];
unsigned char pktLen;

TI_CC_SPIStrobe(TI_CCxxx0_SRX);
if ((TI_CC_SPIReadStatus(TI_CCxxx0_RXBYTES) & TI_CCxxx0_NUM_RXBYTES))
{
pktLen = TI_CC_SPIReadReg(TI_CCxxx0_RXFIFO); // Read length byte

if (pktLen <= *length) // If pktLen size <= rxBuffer
{
TI_CC_SPIReadBurstReg(TI_CCxxx0_RXFIFO, rxBuffer, pktLen); // Pull data
*length = pktLen; // Return the actual size
TI_CC_SPIReadBurstReg(TI_CCxxx0_RXFIFO, status, 2);
return (unsigned char)(status[TI_CCxxx0_LQI_RX]&TI_CCxxx0_CRC_OK);
} // Return CRC_OK bit
else
{
*length = pktLen; // Return the large size
TI_CC_SPIStrobe(TI_CCxxx0_SFRX); // Flush RXFIFO
return 0; // Error
}
}
else
return 0; // Error
}

接收解码错误后，不能再解码成功，但重新上电后又可以

您好，我最近也遇到了类似的问题，请问您的问题解决了吗？

清空一下RX FIFO然后再放入接收状态