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CC1101不定长封包数据的发送与接收

时间:12-22 整理:3721RD 点击:

老师,您好,我在采用CC1101做无线数据的发送与接收时遇到一点问题,老是掉数据。后来仔细看datasheet,对CC1101工作流程等还不是很清晰,特别是采用中断方式处理不定长数据包的情况,因为没有检测仪器,所以看不到信号的波形。另外因为贵公司的网站速度很忙,老是打不开一些文档,所以到现在我还不清楚CC1101有哪些资料可供参考。想请老师提供一点CC1101的资料的连接,另外就是能不能专门写个CC1101的流程email给我,或是直接放在这里。比如这样写,封包《64字节的操作流程://----------------------------------------------------------------
// TX (IOCFG0 = 0x06)
halSpiWriteBurstReg(CCxxx0_TXFIFO, txBuffer, sizeof(txBuffer));
halSpiStrobe(CCxxx0_STX);
// Wait for GDO0 to be set -> sync transmitted
while (!P0_6);
// Wait for GDO0 to be cleared -> end of packet
while (P0_6);
//----------------------------------------------------------------
// RX (IOCFG0 = 0x06)
halSpiStrobe(CCxxx0_SRX);
// Wait for GDO0 to be set -> sync received
while (!P0_6);
// Wait for GDO0 to be cleared -> end of packet
while (P0_6);
length = halSpiReadByte(CCxxx0_RXFIFO);
halSpiReadBurstReg(CCxxx0_RXFIFO, rxBuffer, length);

Packet Size ≤ 255 Bytes采用中断方式的操作流程?

可以用语句,或是流程图都可以,谢谢!

另外我说的掉包是我采用不定长方式,每次发送不超过64字节的包长度,发送采用查询GDO0状态,接收采用GDO2的中断,偶尔会掉1.2个字节,

433M 120K速率,发送接收相同的配置,距离1米,没数据发送的时候一直处于RX,有数据发送就转到TX,发完又返回RX ,有时候不只出现掉数据的问题,有时候还会出现判断MISO或是GDO0死的情况,程序执行不下去,被看门狗复位。

配置表:

    0x30,   // MCSM1     让RF没事就转入RX状态
    0x08,   // FSCTRL1   Frequency synthesizer control.
    0x00,   // FSCTRL0   Frequency synthesizer control.
    0x10,   // FREQ2     Frequency control word, high byte.
    0xA7,   // FREQ1     Frequency control word, middle byte.
    0x62,   // FREQ0     Frequency control word, low byte.

    0x5C,  // MDMCFG4       Modem Configuration
    0x2E,  // MDMCFG3       Modem Configuration BTL=119K
    0x03,  // MDMCFG2       Modem Configuration
    0x22,   // MDMCFG1   Modem configuration.
    0xF8,   // MDMCFG0   Modem configuration.

    0x00,   // CHANNR    Channel number.
    0x47,   // DEVIATN   Modem deviation setting (when FSK modulation is enabled).
    0xB6,   // FREND1    Front end RX configuration.
    0x10,   // FREND0    Front end RX configuration.
    0x18,   // MCSM0     Main Radio Control State Machine configuration.
    0x1D,   // FOCCFG    Frequency Offset Compensation Configuration.
    0x1C,   // BSCFG     Bit synchronization Configuration.
    0xC7,   // AGCCTRL2  AGC control.
    0x00,   // AGCCTRL1  AGC control.
    0xB2,   // AGCCTRL0  AGC control.
    0xEA,   // FSCAL3    Frequency synthesizer calibration.
    0x2A,   // FSCAL2    Frequency synthesizer calibration.
    0x00,   // FSCAL1    Frequency synthesizer calibration.
    0x11,   // FSCAL0    Frequency synthesizer calibration.
    0x59,   // FSTEST    Frequency synthesizer calibration.
    0x81,   // TEST2     Various test settings.
    0x35,   // TEST1     Various test settings.
    0x09,   // TEST0     Various test settings.
    0x06,   // IOCFG2    GDO2 output pin configuration.
    0x06,   // IOCFG0    GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
    0x04,   // PKTCTRL1  Packet automation control.
    0x05,   // PKTCTRL0  Packet automation control.
    0x00,   // ADDR      Device address.
    0xff    // PKTLEN    Packet length.

 

 

 

// Chipcon

// Product = CC430Fx13x

// Chip version = C   (PG 0.7)

// Crystal accuracy = 10 ppm

// X-tal frequency = 26 MHz

// RF output power = 0 dBm

// RX filterbandwidth = 101.562500 kHz

// Deviation = 19 kHz

// Datarate = 38.383484 kBaud

// Modulation = (1) GFSK

// Manchester enable = (0) Manchester disabled

// RF Frequency = 914.999969 MHz

// Channel spacing = 199.951172 kHz

// Channel number = 0

// Optimization = -

// Sync mode = (3) 30/32 sync word bits detected

// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX

// CRC operation = (1) CRC calculation in TX and CRC check in RX enabled

// Forward Error Correction =

// Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word.

// Packetlength = 61

// Preamble count = (2)  4 bytes

// Append status = 1

// Address check = (0) No address check

// FIFO autoflush = 0

// Device address = 0

// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet

// GDO2 signal selection = (41) RF_RDY

RF_SETTINGS rfSettings = {

   0x08,   // FSCTRL1   Frequency synthesizer control.

   0x00,   // FSCTRL0   Frequency synthesizer control.

   0x23,   // FREQ2     Frequency control word, high byte.

   0x31,   // FREQ1     Frequency control word, middle byte.

   0x3B,   // FREQ0     Frequency control word, low byte.

   0xCA,   // MDMCFG4   Modem configuration.

   0x83,   // MDMCFG3   Modem configuration.

   0x93,   // MDMCFG2   Modem configuration.

   0x22,   // MDMCFG1   Modem configuration.

   0xF8,   // MDMCFG0   Modem configuration.

   0x00,   // CHANNR    Channel number.

   0x34,   // DEVIATN   Modem deviation setting (when FSK modulation is enabled).

   0x56,   // FREND1    Front end RX configuration.

   0x10,   // FREND0    Front end TX configuration.

   0x18,   // MCSM0     Main Radio Control State Machine configuration.

   0x16,   // FOCCFG    Frequency Offset Compensation Configuration.

   0x6C,   // BSCFG     Bit synchronization Configuration.

   0x43,   // AGCCTRL2  AGC control.

   0x40,   // AGCCTRL1  AGC control.

   0x91,   // AGCCTRL0  AGC control.

   0xE9,   // FSCAL3    Frequency synthesizer calibration.

   0x2A,   // FSCAL2    Frequency synthesizer calibration.

   0x00,   // FSCAL1    Frequency synthesizer calibration.

   0x1F,   // FSCAL0    Frequency synthesizer calibration.

   0x59,   // FSTEST    Frequency synthesizer calibration.

   0x81,   // TEST2     Various test settings.

   0x35,   // TEST1     Various test settings.

   0x09,   // TEST0     Various test settings.

   0x47,   // FIFOTHR   RXFIFO and TXFIFO thresholds.

   0x29,   // IOCFG2    GDO2 output pin configuration.

   0x06,   // IOCFG0    GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.

   0x04,   // PKTCTRL1  Packet automation control.

   0x05,   // PKTCTRL0  Packet automation control.

   0x00,   // ADDR      Device address.

   0x78    // PKTLEN    Packet length.

};

这个是cc430不定长数据包发送的配置文件,可参考

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